Principal Power Systems Engineer: Snapdragon Compute Chipsets - San Diego, California, United States of America
$211,900 - $317,900 USD yearly
Originally posted 18 May 2026 by the employer.
Focus on power architecture and system-level power modeling for Snapdragon Compute Chipsets.
About the role
This role involves leading cross-functional power modeling and optimization across hardware and software for Snapdragon Compute Chipsets. You will guide power-efficient design throughout the development cycle from initial power architecture trade-offs to end-to-end platform solutions.
What you'll do
- Lead power architecture and trade-off analysis across SOC, chipset, and platform solutions. - Perform chipset and system-level power modeling, analysis, and optimization to identify requirements and quantify power risk areas. - Guide cross-functional teams (systems, software, hardware, silicon process, and production test) to achieve target power consumption across design cycles. - Design low-power features and optimize power efficiency and performance for current and future compute architectures. - Interact with customers to understand specific power requirements, demonstrate chipset capabilities, and model customer-specific use cases.
What you'll need
- Master’s degree in Electrical Engineering or equivalent field.
Nice to have
- 10+ years of professional experience in analysis and design of low power features at SOC, chipset, or platform level. - Architectural knowledge in application processor, modem processor, AR/XR, machine learning, mobile, or computing. - System knowledge of mobile SOC or chipset. - Experience with hardware or software design or optimizations of low power features. - System-level power modeling and analysis experience. - Understanding of machine learning networks for compute applications.
Skills: power architecture, chipset and system level power modeling, SOC, chipset and platform solutions, low power features, mobile SOC
This role has been open 158 days — well above the 78-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
473
|
Median days open
78 d
|
Median salary
$239k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (473 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 80 | 473 |
| Open roles in the wider Digital Design & Verification family | 424 | 3328 · 115 employers |
| Median days open | 83 d | 78 d (+5 d vs this employer) |
| Median salary (USD postings) | — | $239k |
Skills observed across this category: power architecture, chipset and system level power modeling, SOC, chipset and platform solutions, low power features, mobile SOC
Who's hiring in this category
- Qualcomm (this employer) · 80 open roles · median 82 d
- NVIDIA · 52 open roles · median 69 d
- Apple · 37 open roles · median 16 d
- AMD · 36 open roles · median 73 d
- Arm Holdings · 27 open roles · median 121 d
- Micron Technology · 21 open roles · median 100 d
How we counted: 473 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.