Principal Performance Modeling Engineer - CA, Santa Clara, United States
$164,640 - $282,240 USD yearly
Originally posted 30 June 2026 by the employer.
About the role
Architect, analyze, and optimize high-performance SoCs for cloud computing and machine learning acceleration, as well as data center systems.
What you'll do
- Participate in microarchitecture exploration, performance modeling, and analysis for GPU and data center systems. - Analyze design architecture and propose solutions to enhance performance and optimize power. - Conduct micro-benchmarking, workload characterization, competitive analysis, bottleneck identification, and optimization. - Develop tools and methodology for performance analysis of workloads. - Propose and implement solutions to processor and system performance issues.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field plus 12 years of relevant experience; or MS plus 8 years of experience as a Computer Architect, Design Engineer, or in a processor design role; or PhD plus 5 years of experience. - Experience with GPU, CPU, or computer system microarchitecture. - Experience with the development and usage of computer system performance models. - Experience with computer workload analysis. - Programming skills including experience with C++ and Python (or similar).
Nice to have
- Master's or PhD with emphasis on computer architecture performance studies.
Skills: microarchitecture, performance modeling, GPU, data center systems, workload analysis
This role has been open 113 days — well above the 76-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
479
|
Median days open
76 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (479 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 35 | 479 |
| Open roles in the wider Digital Design & Verification family | 254 | 3283 · 116 employers |
| Median days open | 70 d | 76 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: microarchitecture, performance modeling, GPU, data center systems, workload analysis
Who's hiring in this category
- Qualcomm · 79 open roles · median 85 d
- NVIDIA · 54 open roles · median 71 d
- Apple · 38 open roles · median 14 d
- AMD (this employer) · 35 open roles · median 71 d
- Arm Holdings · 27 open roles · median 119 d
- Micron Technology · 22 open roles · median 111 d
How we counted: 479 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.