$190,000 - $220,000 USD yearly
Lead full-chip ASIC implementation and timing signoff for a mixed-signal SoC controller.
About the role
This role leads full-chip ASIC implementation of a mixed-signal SoC controller, including the integration of custom analog blocks at the digital top level.
What you'll do
- Lead full-chip ASIC implementation of a mixed-signal SoC controller, integrating custom analog blocks at the digital top level.
- Drive the P&R team to ensure smooth netlist handoffs and timely execution of P&R deliverables.
- Participate in flow reviews with the P&R team to achieve target PPA across all blocks.
- Lead timing signoff for the post-P&R database.
What you'll need
- BS or MS in Electrical Engineering or a related field.
- 12+ years of experience in ASIC implementation, with multiple successful tape-outs in advance process nodes.
- Experience leading full-chip development of complex multi-processor SoC subsystems with bus fabrics and NoCs.
- Hands-on experience with lint, CDC, synthesis, formal verification, DFT, and STA flows, including writing timing constraints at block and full-chip levels.
- Expertise in Verilog and SystemVerilog, and proficiency in Perl, Python, or similar scripting languages.
- Experience integrating custom analog blocks into a digital top level.
Skills: synthesis, STA, P&R, timing signoff, CDC, SystemVerilog
More semiconductor jobs: Physical design jobs · California jobs
First seen in our index 0 days ago, well below the 62-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
753
|
Median days since first seen
62 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Lumotive | All employers we track in this specialty (753 roles · 90 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 753 |
| Open roles in the wider Physical Implementation family | 1 | 1695 · 122 employers |
| Median days since first seen | 0 d | 62 d (+62 d vs this employer) |
| Median salary (USD postings) | n/a | $187k |
Skills observed across this category: synthesis, STA, P&R, timing signoff, CDC, SystemVerilog
Who's hiring in this category
- Qualcomm · 119 open roles · median 66 d
- AMD · 66 open roles · median 45 d
- Broadcom · 53 open roles · median 24 d
- NVIDIA · 46 open roles · median 85 d
- Synopsys · 44 open roles · median 43 d
- Apple · 32 open roles · median 8 d
How we counted: 753 open Physical Design (Physical Design) roles from 90 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.