Principal Kernel & Device Drivers Engineer - San Jose, California, United States
$180,000 USD yearly
Originally posted 8 April 2026 by the employer.
Own kernel-level drivers and low-level software for high-speed IO, memory, and networking subsystems on the SambaNova RDU architecture.
About the role
SambaNova is seeking a Principal Engineer to own kernel-level drivers and low-level software for high-speed IO, memory, and networking subsystems within the DataScale platform and RDU architecture. This hands-on Linux kernel and device driver role focuses on software bring-up of new silicon and production driver delivery across the IO, memory, and network data paths.
What you'll do
- Own kernel-space drivers for high-speed IO, memory, and networking subsystems from architecture through production release. - Own the RDMA and network data path, including queue-pair management, congestion control, QoS, and packet classification. - Lead software enablement for platform bring-up across new silicon and system configurations, including PHY and link bring-up. - Drive issues to root cause across kernel, firmware, and hardware layers alongside hardware, firmware, and validation teams. - Build tools, test scripts, and frameworks for device and NIC verification, performance analysis, and manufacturing test. - Identify and resolve bottlenecks across the driver, network stack, and system layers, while setting code quality standards through design and code reviews.
What you'll need
- MS in Computer Science, Electrical Engineering, or a related field. - 7+ years of experience in kernel or low-level system software development. - Deep expertise in Linux systems programming and kernel driver development. - Strong knowledge of Linux kernel networking, including network driver development and the RDMA protocol. - Strong C/C++ programming and debugging skills, with scripting in Python or shell. - Experience with two or more high-speed IO or interconnect technologies such as PCIe, Ethernet, or CXL. - Proven ability to lead hardware-software co-debug from first silicon to production, alongside reading register-level documentation and hardware specifications.
Nice to have
- Hands-on RDMA data-path or driver implementation experience. - Experience with virtual switching and data center networking at scale. - Experience writing test scripts to verify NIC behavior. - Firmware development experience. - Exposure to pre-silicon validation using FPGA or emulation platforms. - Background in high-performance computing or accelerator-based systems.
Skills: post-silicon validation, high-speed IO, memory subsystems, debug, PCIe
This role has been open 200 days — well above the 41-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
430
|
Median days open
41 d
|
Median salary
$166k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SambaNova | All employers we track in this specialty (430 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 430 |
| Open roles in the wider Silicon Validation & Test family | 4 | 2235 · 112 employers |
| Median days open | 200 d | 41 d (+159 d vs this employer) |
| Median salary (USD postings) | — | $166k |
Skills observed across this category: post-silicon validation, high-speed IO, memory subsystems, debug, PCIe
Who's hiring in this category
- AMD · 54 open roles · median 44 d
- Qualcomm · 38 open roles · median 31 d
- Micron Technology · 36 open roles · median 40 d
- NVIDIA · 24 open roles · median 25 d
- Microchip Technology · 22 open roles · median 76 d
- Apple · 20 open roles · median 3 d
How we counted: 430 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.