Originally posted 28 July 2026 by the employer.
This role focuses on developing advanced High Bandwidth Memory (HBM) solutions.
About the role
This role drives tapeout execution, release readiness, and design governance for HBM programs, partnering with design, integration, verification, and product teams to deliver high-quality designs on schedule. It focuses on advanced High Bandwidth Memory (HBM) solutions within the Heterogeneous Integration Group (HIG).
What you'll do
- Lead tapeout execution and release coordination for HBM builds, managing schedules, DBR achievements, and release readiness.
- Drive preparation, review, and completion of tapeout collateral, including TOAST, RCDB, TWIT, and related release documentation.
- Coordinate signoff readiness across timing, power, physical verification, and integration activities.
- Ensure database quality, completeness, traceability, and signoff evidence are in place prior to tapeout.
- Manage release risks, waivers, open items, and governance processes while maintaining strong release discipline.
What you'll need
- Bachelor’s degree in Electrical Engineering or a related field, or equivalent experience.
- Proven experience with SoC, memory, or semiconductor tapeout execution and design release processes.
- Strong knowledge of DBR processes, tapeout checklists, release governance, and signoff methodologies.
- Hands-on experience preparing or reviewing TOAST, RCDB, TWIT, or equivalent tapeout artifacts.
- Demonstrated ability to manage release readiness, risk tracking, and progress in deadline-focused environments.
Nice to have
- 10+ years of relevant semiconductor industry experience.
- Experience coordinating cross-functional design, verification, physical design, and product engineering teams through tapeout.
- Experience with formal program or project management tools and methodologies.
- Experience working with Agentic AI tools to assist with design and verification.
Skills: HBM designs, tapeout execution, tapeout schedules, physical verification, signoff readiness
This role has been open 137 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: HBM designs, tapeout execution, tapeout schedules, physical verification, signoff readiness
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.