Principal HBM Architecture & Circuit Design Engineer
$139,000 - $308,000 USD yearly
Originally posted 27 October 2026 by the employer.
About the role
This role owns HBM core-die architecture and critical DRAM circuit design that directly impact bandwidth, power, area, thermal efficiency, and long-term reliability. The engineer drives architecture definition, circuit feasibility, and Architecture Reference Design (ARD) development across 3D-stacked HBM products.
What you'll do
- Own HBM core-die architecture including Bank/Bank-Group organization, array partitioning, datapath, refresh, and reliability features.
- Drive critical DRAM circuit design and timing closure for row, column, sensing, and datapath paths.
- Develop and optimize architecture solutions for bandwidth, power, area, thermal, and reliability trade-offs.
- Define and validate refresh, row-hammer mitigation, data-retention, and power-efficient operation schemes.
- Lead architecture feasibility studies using transistor-level simulation and physical implementation analysis.
- Develop HBM Architecture Reference Designs (ARD), including golden schematics, timing budgets, and verification methodology.
- Collaborate with Array, Datapath, ECC, TSV, PDN, Layout, Verification, and DFT teams to support silicon bring-up, characterization, and failure analysis.
What you'll need
- Proven experience in DRAM architecture and circuit design across HBM, DDR, LPDDR, GDDR, or equivalent.
- Strong understanding of DRAM array architecture, row/column paths, sensing, datapath, refresh, and reliability mechanisms.
- Hands-on experience with SPICE-based circuit simulation tools such as HSPICE, Spectre, FineSim, PrimeSim, or equivalent.
- Demonstrated ability to evaluate performance, power, area, thermal, and reliability trade-offs.
- Experience driving architecture decisions and cross-functional technical execution.
Skills: HBM, DRAM, SPICE, array architecture, sensing, timing closure
More semiconductor jobs: Micron Technology jobs
This role has been open 9 days — well below the 72-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
302
|
Median days open
72 d
|
Category median salary (all employers)
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (302 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 154 | 302 |
| Median days open | 81 d | 72 d (+9 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: HBM, DRAM, SPICE, array architecture, sensing, timing closure
Who's hiring in this category
- Micron Technology (this employer) · 154 open roles · median 82 d
- Synopsys · 30 open roles · median 77 d
- Qualcomm · 18 open roles · median 106 d
- Broadcom · 16 open roles · median 78 d
- SanDisk · 15 open roles · median 7 d
- NVIDIA · 8 open roles · median 59 d
How we counted: 302 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 6 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.