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Teradyne

Principal Hardware Engineer (Teradyne, San Jose, CA)

Teradyne San Jose, CA, United States 3 months ago
Digital Design & SoC Architecture

$169,700 - $271,500 USD yearly

Originally posted 1 August 2026 by the employer. Relisted by the employer on 17 September 2026.

Join the Memory Tester Business Unit team designing IC testers for the DRAM and Flash memory market.

About the role

This role involves leading hardware development for large-scale, multi-board hardware systems within the Memory Tester Business Unit, designing IC testers for the DRAM and Flash memory market.

What you'll do

- Own system and board level architecture for multi-board hardware systems - Lead end-to-end hardware development from concept through design, test, manufacture, and customer release - Lead complex high-speed digital, analog, power, FPGA, and ASIC-based designs - Ensure robust product quality through high-speed design practices and understanding of signal integrity and power integrity - Define and influence product architecture and technology roadmaps aligned to customer needs - Act as a technical escalation point to solve complex design and customer issues and perform root cause analysis

What you'll need

- Bachelors or Masters in Electrical Engineering, or relevant field - 12+ years of experience in hardware, board design, and architecture with demonstrated ownership of complex systems from concept through production - Experience leading and designing all aspects of board level circuitry, including high speed digital, custom analog design, power distribution, and FPGA-based systems, with knowledge of mechanical and thermal considerations - Expert level knowledge of high-speed interconnects (DDR, PCIe, USB, SerDes) and PCB design techniques including signal integrity (SI) and power integrity (PI) in multi-board systems - Ability to lead complex, cross-functional development efforts to deliver innovative hardware solutions - Experience leading technical innovation for development of future products and product roadmap definition

Nice to have

- Proven ability to mentor, guide, and influence engineering teams - Experience acting as an advisor to senior leadership, customers, partners and suppliers on complex technical issues and applications - Strong analytical skills

Market context

This role has been open 78 days — well above the 51-day median for Hardware Systems Engineering roles.

Hardware Systems Engineering · AI ML Hardware

Open roles in category
963
Median days open
51 d
Median salary
$156k
See the full market breakdown ▾Category comparison, and who else is hiring
How Teradyne compares in Hardware Systems Engineering hiring
Metric Teradyne All employers we track in this specialty (963 roles · 102 employers)
Open roles in this specialty 57 963
Open roles in the wider Software, Firmware & Systems family 106 6118 · 145 employers
Median days open 31 d 51 d (−20 d vs this employer)
Median salary (USD postings) — $156k

Who's hiring in this category

  • Intel Corporation · 73 open roles · median 36 d
  • KLA Corporation · 65 open roles · median 44 d
  • Teradyne (this employer) · 57 open roles · median 30 d
  • NVIDIA · 51 open roles · median 68 d
  • Applied Materials · 50 open roles · median 66 d
  • AMD · 47 open roles · median 50 d

How we counted: 963 open Hardware Systems Engineering (AI ML Hardware) roles from 102 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.

Apply now
San Jose, CA, United States
On-site
$169,700 - $271,500 USD yearly
3 months ago

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