Principal Hardware Applications Engineer – PCIe Switches (Scorpio) - Vancouver, British Columbia, Canada
$165,000 - $210,000 USD yearly
Originally posted 18 August 2026 by the employer.
This role focuses on Scorpio Smart Fabric Switches.
About the role
This role involves leading technical engagements and product applications for Scorpio Smart Fabric Switches, guiding customers from evaluation to production deployment. You will be instrumental in driving and validating new features across PCIe Gen 6 / Gen 7 & UALink platforms.
What you'll do
- Lead technical engagements with hyperscalers, ODMs, and AI system partners from architecture discussions through design-in and evaluation.
- Own on-site and remote bring-up, debug, and performance tuning of Scorpio-based platforms at customer sites.
- Translate customer requirements into actionable feedback for product, silicon, and firmware teams.
- Debug complex multi-domain issues spanning protocol (UALink, UCIe, PCIe Gen 6/7), signal integrity, firmware, and software stacks.
- Partner with hardware, firmware, and SI/PI teams to root-cause issues and deliver production-ready solutions.
- Author white papers, technical collateral, and training materials.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 8+ years of experience in product applications, systems engineering, or post-silicon validation on high-speed connectivity or networking silicon.
- Strong understanding of the physical layer and high-speed serial interfaces (PCIe, Ethernet, UALink, UCIe, or similar).
- Hands-on experience with lab bring-up, debug, and system-level integration — including scopes, BERTs, and protocol analyzers.
- Proven track record engaging directly with hyperscaler, cloud, or Tier-1 OEM/ODM customers on complex technical deployments.
- Excellent communication skills with the ability to translate deep technical detail into clear customer-facing narratives.
Nice to have
- MS or PhD in Electrical Engineering, Computer Engineering, or a related field.
- Direct experience with PCIe Gen 6 / Gen 7, UALink, or UCIe protocols and compliance testing.
- Familiarity with AI/ML rack-scale architectures, GPU fabrics, and accelerator interconnects.
- Scripting and automation experience (Python, shell) for validation and diagnostics.
- Background contributing to standards bodies (PCI-SIG, UALink Consortium, UCIe) or authoring technical publications.
Skills: customer-facing, design-in, debug, PCIe Gen 6/7, UALink, post-silicon validation
This role has been open 70 days — slightly above the 63-day median for Applications FAE roles.
Applications FAE · Serdes Highspeed
|
Open roles in category
89
|
Median days open
63 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (89 roles · 23 employers) |
|---|---|---|
| Open roles in this specialty | 15 | 89 |
| Median days open | 73 d | 63 d (+10 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: customer-facing, design-in, debug, PCIe Gen 6/7, UALink, post-silicon validation
Who's hiring in this category
- Astera Labs (this employer) · 15 open roles · median 73 d
- Synopsys · 13 open roles · median 41 d
- Keysight Technologies · 11 open roles · median 48 d
- Qualcomm · 9 open roles · median 56 d
- Microchip Technology · 7 open roles · median 47 d
- Marvell Technology · 5 open roles · median 185 d
How we counted: 89 open Applications FAE (Serdes Highspeed) roles from 23 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.