Principal Front-End Design Engineer - 18968
Lead front-end methodology and AI-driven workflows across IP and SoC development using VCS, Fusion Compiler, Design Compiler, and TestMAX.
Originally posted 8 November 2026 by the employer.
About the role
As a Principal Front-End Design Engineer, you will lead methodology, subsystem architecture, and AI-enabled design workflows across IP and SoC development. You will be part of the Digital Methodology Interop Engineering team advancing IP and subsystem design.
What you'll do
- Develop and deploy AI-driven solutions for verification, synthesis, constraints, and DFT workflows.
- Architect reusable subsystem reference designs for Synopsys IP.
- Debug and optimize front-end design methodologies and automation flows.
- Drive adoption of best practices across design and verification teams.
- Collaborate with EDA, IP, and customer-facing engineers to solve complex design challenges.
- Mentor engineers through technical leadership and knowledge sharing.
What you'll need
- BS/MS in Electrical Engineering, Computer Engineering, or a related field.
- 10+ years of ASIC, SoC, or IP design and verification experience.
- Expertise in verification, synthesis, timing constraints, DFT, CDC/RDC, or lint methodologies.
- Strong experience with Synopsys tools such as VCS, VC SpyGlass, Fusion Compiler, Design Compiler, and TestMAX.
- Proficiency in SystemVerilog, UVM, Tcl, Python, or similar languages.
- Demonstrated technical leadership and influence across cross-functional engineering teams.
More semiconductor jobs: Synopsys jobs · EDA tools engineer jobs · Sunnyvale jobs
First seen in our index 0 days ago, well below the 21-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · AI EDA Design
|
Open roles in category
105
|
Median days since first seen
21 d
|
Category median salary (all employers)
$214k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (105 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 105 |
| Open roles in the wider Physical Implementation family | 118 | 1638 · 118 employers |
| Median days since first seen | 6 d | 21 d (+15 d vs this employer) |
| Median salary (USD postings) | n/a | $214k |
Who's hiring in this category
- Keysight Technologies · 13 open roles · median 20 d
- NVIDIA · 13 open roles · median 43 d
- NXP Semiconductors · 10 open roles · median 101 d
- STMicroelectronics · 7 open roles · median 7 d
- Synopsys (this employer) · 7 open roles · median 21 d
- Cadence Design Systems · 6 open roles · median 77 d
How we counted: 105 open EDA/CAD Engineering (AI EDA Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.