Principal Foundry Interface Design Engineer, HBM
Originally posted 15 September 2026 by the employer — open 4 days.
This role focuses on HBM DRAM products.
About the role
This full-time onsite role provides critical technology support for the design and development of advanced HBM DRAM products, serving as a bridge between internal design teams, foundries, and technology development groups. Your work will directly impact performance, power efficiency, reliability, and the long-term HBM roadmap.
What you'll do
- Act as the primary technical interface between foundry partners and Micron design organizations.
- Drive closure of design-process gaps through collaborative engagement with foundry process teams.
- Influence foundry roadmaps related to TSV, BEOL, reliability, and design enablement.
- Define technology requirements for future HBM and custom memory products.
- Perform HSPICE simulations for technology evaluation and design optimization.
- Evaluate compact models, PDK SPICE models, and process corners.
- Plan and implement technology evaluation test chips.
- Identify and implement AI-enabled workflows, automation opportunities, and knowledge-management practices to improve engineering productivity.
What you'll need
- BS, MS, or PhD or equivalent experience in Electrical Engineering, Computer Engineering, or related field.
- 6+ years of semiconductor industry experience.
- Solid understanding of advanced semiconductor technology development.
- Strong grasp of advanced CMOS technology nodes, FinFET devices, and process integration.
- Hands-on experience with HSPICE simulations.
- Hands-on experience with Device characterization.
- Hands-on experience with Standard cell benchmarking.
- Hands-on experience with PPA analysis.
- Hands-on experience with Parasitic extraction and physical verification.
- Experience in driving AI-enabled engineering practices and automation to improve the efficiency of DTCO analysis, foundry collateral evaluation, PDK enablement, benchmarking, and collaboration across build teams.
Nice to have
- Experience working directly with leading foundries such as TSMC, Samsung, Intel Foundry Services, or GlobalFoundries.
- Experience with memory products including DRAM, HBM, or SRAM.
- Knowledge of TSV technologies.
- Knowledge of Advanced packaging.
- Knowledge of Reliability modeling and aging simulations.
- Knowledge of Advanced BEOL technologies.
- Knowledge of PDK development and validation.
- Ability to apply AI tools to summarize, analyze, and extract insights from PDK documentation, Design Rule Manuals (DRMs), Reliability reports, foundry collateral, and Silicon characterization data.
- Experience leading technology pathfinding and node selection activities.
This role has been open 4 days — well below the 86-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
668
|
Median days open
86 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (668 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 35 | 668 |
| Open roles in the wider Physical Implementation family | 67 | 1373 · 107 employers |
| Median days open | 121 d | 86 d (+35 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Who's hiring in this category
- Cadence Design Systems · 168 open roles · median 148 d
- Synopsys · 55 open roles · median 59 d
- NVIDIA · 46 open roles · median 64 d
- Micron Technology (this employer) · 35 open roles · median 121 d
- Qualcomm · 34 open roles · median 72 d
- Intel Corporation · 29 open roles · median 25 d
How we counted: 668 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.