Principal Engineer, SOC Design - San Jose, California, United States
$219,000 - $351,000 USD yearly
Originally posted 3 September 2026 by the employer.
Develop prototype and production memory controllers integrating ARM cores, DDR controllers, and UCIe PHY interfaces.
About the role
The Principal Engineer, SOC Design develops silicon solutions within the DRAM Development Lab (DDL) to enhance memory and storage capabilities through prototype and production controllers.
What you'll do
- Participate in architectural definitions and lead subsystem and chip-level micro architecture. - Handle top-level integration, logic design, and RTL implementation alongside quality checks including Assertion, Lint, CDC, and STA. - Review and integrate third-party IPs and subsystems at the top level, including ARM cores, DDR controller, and UCIe PHY. - Work closely with architects and verification engineers to ensure sound SoC design. - Collaborate with physical design engineers on timing constraints, synthesis, DFT insertion, and static timing analysis.
What you'll need
- Bachelor's in Electrical, Computer Science, or related field with 20+ years of experience, Master's with 18+ years, or PhD with 15+ years of industry experience. - Hands-on knowledge and experience across the ASIC design flow from initial design through tape out. - Experience with commercial IPs including UCIe, CPU, Ethernet, and DDR interfaces. - Knowledge and experience with AMBA bus fabric and ARM cores. - Experience in SoC-level synthesis, static timing analysis (STA), lint checks, and CDC checks. - Experience in ATE vector generation, testing, silicon bring-up, and interfacing with third-party service companies for DFT/PI/PD.
Skills: architectural definitions, micro architecture, RTL implementation, 3rd party IPs, UCIe
This role has been open 52 days — well below the 81-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
472
|
Median days open
81 d
|
Median salary
$240k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (472 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 472 |
| Open roles in the wider Digital Design & Verification family | 14 | 3310 · 115 employers |
| Median days open | 56 d | 81 d (−25 d vs this employer) |
| Median salary (USD postings) | — | $240k |
Skills observed across this category: architectural definitions, micro architecture, RTL implementation, 3rd party IPs, UCIe
Who's hiring in this category
- Qualcomm · 80 open roles · median 84 d
- NVIDIA · 54 open roles · median 68 d
- Apple · 37 open roles · median 18 d
- AMD · 36 open roles · median 75 d
- Arm Holdings · 27 open roles · median 123 d
- Micron Technology · 21 open roles · median 102 d
How we counted: 472 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.