Principal Engineer, Power Integrity - Santa Clara, CA, United States

Originally posted 15 October 2026 by the employer.

About the role

This role drives execution across highly complex, cross-functional programs addressing demanding challenges in AI, wired and wireless communications, and critical infrastructure markets, focusing on power delivery network (PDN) analysis, power plane design, and verification across board, switch, and optical platforms operating at high-speed data rates.

What you'll do

- Own end-to-end power integrity analysis including SoC package, board, and system-level power domains across board, switch, and optics platforms. - Develop PDN target impedance specifications and decoupling capacitor strategies, translating power supply requirements into board and package design. - Perform power plane design, modeling, and analysis, and generate package and PCB models to support PI simulation and measurement correlation. - Evaluate VRM/regulator behavior, loop stability and control-loop interaction with the PDN, transient/load-step response, and voltage droop. - Develop PI methodologies, rules, and workflows to meet platform-level specifications across critical power domains. - Perform VNA and TDR-based lab measurements to correlate simulation results with real-world power delivery performance.

What you'll need

- Bachelor's degree in Electrical Engineering or related field and 10-15 years of related professional experience; Master's degree and/or PhD in Electrical Engineering or related field with 5-10 years of experience. - Strong fundamentals in EM, transmission lines, and microwave theory, with in-depth knowledge of PDN analysis and high-speed differential and single-ended signals. - Proficiency in power plane design, modeling, and analysis using tools such as PowerSI, SIwave, or Cadence Sigrity. - Experience with 2-D and 3-D EM simulation tools such as Ansys HFSS, HSPICE, ADS, or COMSOL. - Experience with VNA and TDR measurements for board and package characterization, along with hands-on lab equipment experience such as oscilloscopes and logic analyzers. - Working experience in EM field solvers and time/frequency domain tools for power domain analysis on SoC, SerDes, and critical power domains.

Nice to have

- Familiarity with decoupling capacitor placement strategies and AC impedance targets across board, switch, and optics platforms. - Understanding, debugging, and simulation of EMI/EMC problems related to power delivery. - Ability to automate PI, and packaging activities using scripting tools like Python.

Skills: power integrity, SoC package, board, PDN target impedance, VRM/regulator behavior, PowerSI