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Samsung Semiconductor

Principal Engineer, FPGA Architecture

Samsung Semiconductor Folsom, California, United States Full-time 4 hours ago
Digital Design & SoC Architecture

$219,000 USD yearly

Prototype novel memory and storage SoC architectures on FPGA to eliminate data movement bottlenecks in AI systems.

Originally posted 11 November 2026 by the employer.

About the role

This role focuses on identifying data movement bottlenecks in AI systems and prototyping novel memory and storage SoC architectures on FPGA with real AI workloads.

What you'll do

  • Define architecture and microarchitecture for SoC blocks and prototype them on FPGA.
  • Analyze AI system workloads, such as LLM inference, to identify memory, storage, and network bottlenecks.
  • Propose and evaluate hardware architectures that address data movement bottlenecks.
  • Design, implement, and debug high-speed interfaces, including Ethernet, PCIe, and memory interfaces.
  • Build high-throughput data paths featuring buffering and flow control mechanisms.
  • Develop simulation and lab-based validation workflows, including stress and error-injection testing.
  • Integrate prototypes with host software, servers, and network equipment while evaluating performance, power, and cost trade-offs.

What you'll need

  • Bachelor's degree (BS, MS, or Ph.D.) in Computer Engineering, Electrical Engineering, or Computer Science.
  • 10+ years of working experience in architecture development.
  • Strong SystemVerilog RTL design and debug skills.
  • Proven FPGA timing closure experience on large, high-speed designs.
  • Hands-on experience with at least one high-speed interface: Ethernet, PCIe, or DDR/LPDDR.
  • Experience in storage (NVMe/SSD), networking (RDMA/RoCE), or memory (CXL) systems.

Nice to have

  • MS or Ph.D. in Computer Engineering, Electrical Engineering, or Computer Science.
  • Publications in AI infrastructure or data systems.

More semiconductor jobs: Samsung Semiconductor jobs · FPGA engineer jobs · California jobs

Market context

First seen in our index 0 days ago, well below the 67-day median for FPGA Design roles.

FPGA Design · RTL Design

Open roles in category
106
Median days since first seen
67 d
Category median salary (all employers)
$162k
See the full market breakdown ▾Category comparison, and who else is hiring
How Samsung Semiconductor compares in FPGA Design hiring
Metric Samsung Semiconductor All employers we track in this specialty (106 roles · 24 employers)
Open roles in this specialty 1 106
Median days since first seen 0 d 67 d (+67 d vs this employer)
Median salary (USD postings) n/a $162k

Who's hiring in this category

  • Altera · 36 open roles · median 60 d
  • AMD · 12 open roles · median 74 d
  • Teradyne · 10 open roles · median 70 d
  • Keysight Technologies · 7 open roles · median 18 d
  • Microchip Technology · 6 open roles · median 92 d
  • Qualcomm · 6 open roles · median 66 d

How we counted: 106 open FPGA Design (RTL Design) roles from 24 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Days are counted from when our index first saw each posting, not from the employer's original posting date.

Samsung Semiconductor

Samsung Semiconductor

Apply now
Folsom, California, United States
On-site
Full-time
$219,000 USD yearly
4 hours ago

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