Principal Engineer- Design (FPGA) - AZ - Chandler, United States

Originally posted 19 August 2026 by the employer.

Join the NCS Team to support PHY development and system-level solutions for USB and Ethernet products.

About the role

This role involves supporting PHY development and system-level solutions for USB and Ethernet products, working closely with digital, analog, and software engineers to develop, integrate, and validate FPGA-based platforms supporting mixed-signal IP and SoC products.

What you'll do

- Develop, integrate, and validate FPGA-based platforms for mixed-signal IP and SoC products. - Define and analyze timing constraints for systems containing multiple clock domains. - Optimize FPGA designs for performance, area/resource utilization, and target clock frequencies. - Perform FPGA system integration and board-level bring-up, including loading FPGA images, exercising hardware interfaces, and debugging designs on physical circuit cards. - Provide clear design documentation, including requirements, FPGA architecture, block diagrams, and interface control documents. - Automate FPGA build, simulation, synthesis, and implementation flows using scripting and programming languages.

What you'll need

- 10+ years of experience in FPGA and/or digital design, with hands-on experience in RTL coding, simulation, synthesis, and hardware implementation. - Strong proficiency in Verilog and/or SystemVerilog for synthesizable RTL design. - Strong understanding of digital design fundamentals, including state machines, datapaths, pipelines, clocking, resets, FIFOs, memories, and interface logic. - Hands-on experience developing self-checking testbenches and performing functional simulation and debug using tools such as QuestaSim/ModelSim or equivalent. - Hands-on experience with FPGA synthesis, implementation, timing analysis, and place-and-route using vendor design environments such as AMD/Xilinx Vivado. - Hands-on experience using laboratory debug equipment such as oscilloscopes, logic analyzers, protocol analyzers, and FPGA embedded logic-debug tools or equivalent. - Proficiency in scripting languages such as TCL, Python, Perl, Linux shell programming, or programming languages such as C++ or RUST for automating FPGA build, simulation, synthesis, and implementation flows. - Knowledge of revision-control systems such as Perforce, Git, DesignSync, or equivalent, including experience with tagging, branching, configuration management, and release methodologies.