Principal Engineer - Design - CA - Roseville, United States
$75,000 - $232,000 USD yearly
Originally posted 5 August 2026 by the employer.
About the role
As a Principal Design Engineer, you will work closely with hardware designers, firmware engineers, and verification teams throughout the SoC development process, focusing on HW/FW co-development and system-level co-verification.
What you'll do
- Port SoC RTL to industry HW emulators and FPGA platforms.
- Develop emulation-specific HW for pre-silicon subsystem/system-level co-verification.
- Develop common test ecosystems across pre/post silicon.
- Develop firmware and tests for pre-silicon subsystem/system-level co-verification.
- Troubleshoot and resolve complex problems in embedded multi-core real-time systems executing emulation test plans.
What you'll need
- BS/MS degree or higher in Electrical/Electronic Engineering or Computer Engineering.
- 10+ years of relevant work experience.
- 5+ years' experience with one or more serial protocols such as SAS/SATA/NVMe and thorough knowledge of PCIe.
- Proficient Linux experience and strong programming/scripting skills with C, Python, Tcl, and Bash.
- Proficient in digital design, RTL coding with VHDL, Verilog, or System Verilog experience.
- Knowledge of MIPS, ARM, or RISC-V architecture, including JTAG, I2C, and firmware programming.
Nice to have
- Experience with RAID HBAs, SAS Controllers and their associated Software Testing Strategies.
- Experience with test automation, testing methodologies, and test tools.
- Isolation and resolution of complex software & firmware problems in embedded real-time systems.
- Knowledge of Embedded Linux development as well as RTOS constructs including processes, threads, scheduling, synchronization mechanisms, memory management.
- Cadence infrastructure support and process flows.
Skills: HW emulators, FPGA platforms, pre-silicon co-verification, RTL, SystemVerilog
This role has been open 74 days — slightly above the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1202
|
Median days open
65 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Microchip Technology | All employers we track in this specialty (1202 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 21 | 1202 |
| Open roles in the wider Digital Design & Verification family | 66 | 3201 · 115 employers |
| Median days open | 67 d | 65 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: HW emulators, FPGA platforms, pre-silicon co-verification, RTL, SystemVerilog
Who's hiring in this category
- Qualcomm · 110 open roles · median 39 d
- AMD · 96 open roles · median 51 d
- NVIDIA · 84 open roles · median 59 d
- Synopsys · 64 open roles · median 33 d
- SiFive · 55 open roles · median 75 d
- Cadence Design Systems · 50 open roles · median 117 d
How we counted: 1202 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.