Principal Engineer, DDR Verification & Silicon DDR bring up (AI2560) - San Jose, California, United States
$203,800 - $315,900 USD yearly
Originally posted 9 October 2026 by the employer.
Verify DDR controllers and DDR-phy at block, sub-system and SoC level.
About the role
This role involves the functional verification of DDR controllers and DDR-phy at block, sub-system and SoC level, and bring-up and debug on emulator.
What you'll do
- Participate in DDR architecture, micro-architecture, and feature discussions and reviews
- Define and develop DDR test bench components using UVM & System Verilog
- Bring up and testing of DDR at MLSoC level in full-chip test environment
- Develop and execute a test plan
- Manage debug of test and regression failures
- Generate required DDR initialization sequence for Silicon bring up and debug in the lab
What you'll need
- BS/MS in EE or CS with 15+ years of experience in functional verification and silicon bring-up
- Experience with UVM and System Verilog based verification methodology
- Working experience on DDR or LPDDR4/5 protocols
- Working experience on DDR bring-up and debug on Silicon
- Experience and relevant skill set for silicon bringup/debug in the lab
- Debug and problem solving skills
This role has been open 0 days — well below the 62-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
112
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | SiMa.ai | All employers we track in this specialty (112 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 112 |
| Open roles in the wider Silicon Validation & Test family | 1 | 2223 · 112 employers |
| Median days open | 0 d | 62 d (−62 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 18 open roles · median 44 d
- AMD · 15 open roles · median 61 d
- NVIDIA · 14 open roles · median 68 d
- Graphcore · 10 open roles · median 119 d
- Amazon · 6 open roles · median 38 d
- Micron Technology · 5 open roles · median 209 d
How we counted: 112 open Post-Silicon Validation (Design Verification) roles from 29 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.