Originally posted 12 August 2026 by the employer.
About the role
This role involves designing complex chips, including analog and digital control circuitry, with a focus on digital DFT design for automotive PMIC products.
What you'll do
- Insert DFT/Scan on digital logic, perform ATPG, and validate test patterns on pre and post layout gate level netlist.
- Deliver test patterns to the test engineering team and validate them on silicon.
- Insert Logicbist with industry standard tools.
- Participate in digital design flow aspects such as Micro-architecture, Design partitioning, RTL Verilog / System Verilog coding, DFT insertion, and generating Timing Constraints.
- Debug scan pattern failures on ATE and fix scan patterns.
- Write detailed design documents, DFT specifications, and review specifications with stakeholders.
What you'll need
- 12+ years of experience with a Master's or 15+ years with a Bachelor's in digital design and DFT implementation.
- Hands-on experience in Scan insertion, improving scan coverage, ATPG, and Logicbist insertion during synthesis or RTL.
- Experience with gate level simulations using test patterns and delivering validated patterns to the Test engineering team.
- Basic digital RTL coding experience and synthesis exposure.
- Experience with at least 8 tapeouts with hands-on DFT/Scan experience.
- Solid understanding of synthesizable design, timing constraints, and exceptions.
- Experience with industry standard Synopsys, Cadence, Mentor, Siemens tools for scan, Logicbist insertion, and ATPG.
Nice to have
- Mixed signal experience.
- Exposure to automotive test requirements and ASIL.
- Tetramax experience.
More semiconductor jobs: Renesas Electronics jobs · DFT engineer jobs · India jobs
This role has been open 84 days — well above the 55-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
279
|
Median days open
55 d
|
Category median salary (all employers)
$206k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (279 roles · 55 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 279 |
| Open roles in the wider Digital Design & Verification family | 89 | 3497 · 120 employers |
| Median days open | 51 d | 55 d (−4 d vs this employer) |
| Median salary (USD postings) | — | $206k |
Who's hiring in this category
- AMD · 37 open roles · median 54 d
- NVIDIA · 23 open roles · median 54 d
- Qualcomm · 22 open roles · median 84 d
- Broadcom · 21 open roles · median 2 d
- NXP Semiconductors · 20 open roles · median 54 d
- Synopsys · 19 open roles · median 34 d
How we counted: 279 open DFT Engineering (DFT Test) roles from 55 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.