Principal ATE Test Development Engineer - Santa Clara, CA, United States
Originally posted 24 June 2026 by the employer. Relisted by the employer on 23 September 2026.
About the role
As a Principal ATE Test Development Engineer in the Operations business group, you will test features on silicon semiconductor chips for internal and external customers to ensure shipped units meet specifications. You will collaborate closely with design engineering to ensure chip features are testable, developing testing strategies, test code, and hardware solutions from engineering bring-up to production.
What you'll do
- Develop and implement ATE test solutions, bringing silicon chips up from the engineering phase to production. - Drive the hardware design team on load board design and debug hardware for high-speed test development. - Develop test code, characterization programs, production programs, and wafer sort test programs. - Convert test patterns from the design simulation environment into ATE format. - Create technical documentation for test plans and test methodologies to satisfy product specifications and delivery schedules. - Lead test standardization, test flow optimization, test time reduction, yield improvement, and test program release procedures.
What you'll need
- Bachelor's degree in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience, or a Master's degree with 3-5 years of experience. - Minimum 6+ years of test program development experience on the Advantest 93K ATE and/or Teradyne tester platform. - Experience in ATE testing, test methodology, silicon process, and DFT/DFM. - Hands-on experience with high-speed interface testing and mixed-signal testing. - Experience with security provisioning test development.
This role has been open 120 days — slightly above the 113-day median for Silicon Test Engineering roles.
Silicon Test Engineering · Silicon Validation
|
Open roles in category
192
|
Median days open
113 d
|
Median salary
$129k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (192 roles · 57 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 192 |
| Open roles in the wider Silicon Validation & Test family | 59 | 2256 · 113 employers |
| Median days open | 120 d | 113 d (+7 d vs this employer) |
| Median salary (USD postings) | — | $129k |
Who's hiring in this category
- Teradyne · 14 open roles · median 116 d
- Qualcomm · 12 open roles · median 111 d
- Renesas Electronics · 12 open roles · median 104 d
- onsemi · 10 open roles · median 137 d
- Infineon Technologies · 9 open roles · median 119 d
- Marvell Technology (this employer) · 9 open roles · median 119 d
How we counted: 192 open Silicon Test Engineering (Silicon Validation) roles from 57 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.