Principal Analog Mixed-Signal Engineer - Rijswijk, Zuid-Holland, Netherlands
Originally posted 29 December 2025 by the employer.
About the role
The Principal Analog Mixed-Signal Engineer will ensure first-pass success on Analog CMOS circuit solutions, leveraging SiTime's MEMS technology.
What you'll do
- Develop precision timing circuit architectures, design innovative circuits with aggressive technical performance specifications, performing transistor-level design and simulations.
- Plan and execute circuit designs that address demanding frequency stability, phase noise, power consumption, and silicon die area specifications.
- Perform technology, architecture, circuit design, and parametric design trade-offs to accomplish spec-compliant designs.
- Supervise and guide Senior Analog Circuit Designers, and supervise Analog Circuit Physical Design Layout.
- Perform post-layout parasitic-extraction and back-annotated simulations to validate design across Process, Voltage, Temperature.
- Initiate Design-of Experiments for Root Cause Analysis, investigate anomalous observations in silicon across PVT conditions, and propose solutions.
What you'll need
- MS Degree in Electrical Engineering.
- Minimum 10 years of high-performance analog circuit design experience.
- Proven track record in Circuit Architecture development and technical feasibility studies, Design partitioning for phase noise / power budgeting, Writing detailed block-level specifications, and Detailed design, test bench development, and simulation of basic analog building blocks.
- Expert-level experiential knowledge of architecting and implementing ultra low-jitter, power-efficient Frac-N PLLs.
- Experiential knowledge of ultra-low phase-noise design, power supply noise considerations, device matching, parasitic extraction, and signal integrity.
- Chip-level design and verification of complex mixed-signal chips.
Nice to have
- PhD in Electrical Engineering.
- 3 years of prior lead/supervisory/managerial experience.
Skills: Analog Mixed-Signal Engineer, precision timing circuit architectures, ultra low-jitter, power-efficient Frac-N PLLs, Analog CMOS circuit solutions, post-layout parasitic-extraction
This role has been open 216 days — well above the 104-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
150
|
Median days open
104 d
|
Median salary
$180k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SiTime | All employers we track in this specialty (150 roles · 39 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 150 |
| Open roles in the wider Analog & Mixed-Signal family | 34 | 1461 · 106 employers |
| Median days open | 216 d | 104 d (+112 d vs this employer) |
| Median salary (USD postings) | — | $180k |
Skills observed across this category: Analog Mixed-Signal Engineer, precision timing circuit architectures, ultra low-jitter, power-efficient Frac-N PLLs, Analog CMOS circuit solutions, post-layout parasitic-extraction
Who's hiring in this category
- Analog Devices · 16 open roles · median 86 d
- SiTime (this employer) · 11 open roles · median 216 d
- Infineon Technologies · 10 open roles · median 76 d
- Apple · 9 open roles · median 12 d
- Microchip Technology · 8 open roles · median 215 d
- NVIDIA · 8 open roles · median 41 d
How we counted: 150 open Mixed-Signal Design (Mixed Signal) roles from 39 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.