Principal Analog Methodology Specialist & AI Enthusiast
Originally posted 6 October 2026 by the employer.
Application-optimized IP.
About the role
This role involves coordinating and accelerating methodology adoption across analog and adjacent engineering domains, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration, and other mixed-signal cross-domain workflows. You will support methodology for application-optimized IP and special-purpose silicon.
What you'll do
- Provide clear ownership for analog and adjacent-domain methodology areas.
- Act as the focal point for customer-driven methodology requirements and integration challenges.
- Be accountable for prioritization, adoption, stakeholder engagement, and execution.
- Improve coordination across product teams and adjacent engineering organizations, including engagement with customers and foundries.
- Support methodology for application-optimized IP and special-purpose silicon customers are building for specific workloads and system architectures.
- Partner with the automation and AI team to prototype, automate, and apply AI on flows where it is useful.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field.
- 18-25 years of experience in IC design with a BSEE, or 15-18 years with an MSEE or PhD.
- Expertise in analog and mixed-signal methodology, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration, and workflow gaps.
- Deep knowledge of transistor-level design, CMOS fundamentals, reliability effects, and SPICE.
- Experience turning customer methodology requirements into integration solutions.
- Proficiency in scripting and automation to prototype flows, and the ability to apply AI where it improves them.
Skills: Analog Methodology, circuit-to-layout, mixed-signal methodology, scripting and automation, AI
This role has been open 3 days — well below the 81-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
690
|
Median days open
81 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (690 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 61 | 690 |
| Open roles in the wider Physical Implementation family | 100 | 1470 · 107 employers |
| Median days open | 38 d | 81 d (−43 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: Analog Methodology, circuit-to-layout, mixed-signal methodology, scripting and automation, AI
Who's hiring in this category
- Cadence Design Systems · 160 open roles · median 169 d
- Synopsys (this employer) · 61 open roles · median 38 d
- Micron Technology · 42 open roles · median 91 d
- Qualcomm · 42 open roles · median 62 d
- NVIDIA · 41 open roles · median 75 d
- GlobalFoundries · 31 open roles · median 52 d
How we counted: 690 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.