Principal Analog Layout Methodology Engineer – AI & Automation - 19299
Originally posted 11 November 2026 by the employer.
About the role
This role leads the definition, development, and deployment of analog layout methodologies, AI workflows, and automation frameworks within the Analog/Mixed-Signal IP (AMSIP) Enablement, Methodology and Automation team. The position supports Synopsys Silicon IP and application-optimized IP (AOIP) initiatives by matching production layout challenges to AI-driven, algorithmic, or rule-based solutions.
What you'll do
- Define strategy and roadmaps for analog layout methodology, evaluating where AI, automation, and rule-based solutions add production value.
- Collect layout user requirements across projects and convert them into engineering specifications with clear acceptance criteria and guardrails.
- Write specifications for AI-enabled layout systems covering problem definition, data requirements, success metrics, validation, and production hand-off.
- Build and review reusable automation frameworks while establishing modular coding standards for long-term reuse.
- Coordinate with CAD/EDA, circuit design, and AI automation teams to manage dependencies, trade-offs, and deployment rollouts.
- Deliver hands-on training, demonstrations, and reviews to enable analog layout engineers to adopt automation tools effectively.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field (MSEE or PhD preferred).
- 10–15 years of experience in IC design.
- Deep expertise in analog and mixed-signal layout, including matching, parasitics, reliability (EM/IR), and physical verification.
- A proven track record of designing, deploying, and maintaining AI/ML or advanced automation in production engineering environments.
- Working knowledge of agentic AI workflows, strong Python programming skills, and proficiency in Tcl or SKILL.
- Experience with version control systems such as Git and Perforce, alongside software engineering practices in modular design, testing, and documentation.
Nice to have
- Familiarity with databases.
Skills: analog layout, AI automation, Python, Tcl/SKILL, methodology
More semiconductor jobs: Synopsys jobs · EDA tools engineer jobs · Sunnyvale jobs
First seen in our index 0 days ago, well below the 21-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · AI EDA Design
|
Open roles in category
105
|
Median days since first seen
21 d
|
Category median salary (all employers)
$214k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (105 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 105 |
| Open roles in the wider Physical Implementation family | 118 | 1638 · 118 employers |
| Median days since first seen | 6 d | 21 d (+15 d vs this employer) |
| Median salary (USD postings) | n/a | $214k |
Skills observed across this category: analog layout, AI automation, Python, Tcl/SKILL, methodology
Who's hiring in this category
- Keysight Technologies · 13 open roles · median 20 d
- NVIDIA · 13 open roles · median 43 d
- NXP Semiconductors · 10 open roles · median 101 d
- STMicroelectronics · 7 open roles · median 7 d
- Synopsys (this employer) · 7 open roles · median 21 d
- Cadence Design Systems · 6 open roles · median 77 d
How we counted: 105 open EDA/CAD Engineering (AI EDA Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.