Principal Analog IC Design Engineer, High Speed SerDes - San Jose, United States
£136,500 - £253,500 GBP yearly
Originally posted 13 August 2026 by the employer — open 27 days.
About the role
The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.
What you'll do
- Design and develop analog/mixed signal IC circuit blocks. - Verify conformance to customer specifications for IC circuit blocks.
What you'll need
- Minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development. - Thorough understanding of jitter and signal equalization techniques. - Proficient design experience in Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, ADC and DAC, Bias and Bandgap, and Voltage Regulators SerDes circuit blocks. - Proficiency in using CAD tools for circuit simulation, layout, and physical verification. - MS or PhD in EE.
Nice to have
- Working knowledge of a set of common SerDes standards and their electrical requirements. - Cadence tool experience. - Lab test experience. - Design experience at >10Gbps and in <28nm technologies.
This role has been open 27 days — well below the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in this specialty | 19 | 217 |
| Open roles in the wider Analog & Mixed-Signal family | 28 | 1317 · 100 employers |
| Median days open | 153 d | 91 d (+62 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems (this employer) · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.