Principal AMS Verification Engineer - Hyderabad - Phoenix Aquila, India

Originally posted 23 June 2026 by the employer — open 79 days.

About the role

This role involves the verification of analog and mixed-signal circuits, with a focus on creating comprehensive full-chip mixed-signal simulation environments where analog, digital, and firmware co-exist.

What you'll do

• Verify analog and mixed-signal circuits.
• Generate full-chip mixed-signal simulation environments encompassing analog, digital, and firmware.
• Create schematic/behavioral models for blocks to enable efficient full-chip simulation.
• Perform device-level electrical rule checks such as SOA, snapback, and SFB.
• Conduct static and dynamic simulations to identify leakage paths.
• Execute power cycling simulations, including PL and brown-out events.
• Review design data sheets and generate verification plans.

What you'll need

• Understanding of MOS device physics, primarily second-order effects.
• Basic knowledge of analog circuits, including CM, BGR, op-amp, regulators, ADC, DAC, and charge pumps.
• Familiarity with shell, Perl/python scripts.
• Familiarity with virtuoso, hspice, xa, and cosim.
• Familiarity with HDLs: Verilog/SV and Verilog A/AMS.
• Debug enthusiast with a system-level outlook.

Skills: mixed signal verification, Verilog A/AMS, virtuoso, hspice, cosmic