Pre-Silicon Signoff Lead - 19498
Originally posted 3 November 2026 by the employer.
About the role
The Pre-Silicon Signoff Lead directs simulation and verification sign-off activities across analog, digital, and hardware teams to deliver high-performance connectivity IP. The role centers on SerDes, transceiver design, and high-speed serial communication technologies supporting PCIe and Ethernet protocols.
What you'll do
- Collaborate across analog, digital, and hardware teams to ensure holistic design and verification coverage.
- Develop and maintain comprehensive simulation and verification plans for IP, aligning with reliability and performance targets.
- Review execution against verification plans through regular reviews with analog, cosim, DV, GLS, formal, and emulation verification teams.
- Establish, monitor, and report on key verification metrics including functional, code, and assertion coverage.
- Coordinate with Firmware & Algorithms Leads and Digital FW Developers to develop hardware regression plans for successive FW releases.
- Deliver verification collateral including test plans, test cases, coverage reports, and sign-off documentation.
What you'll need
- MSc or PhD in Electrical or Computer Engineering, with 10+ years of relevant industry experience.
- Deep expertise in high-speed protocols including PCIe and Ethernet.
- Proficiency in SystemVerilog, object-oriented verification, UVM/VMM/OVM, assertion-based verification, and coverage closure.
- Strong scripting and programming skills in Python, TCL, Perl, or C/C++.
- In-depth knowledge of high-speed analog and digital design principles.
- Familiarity with verification flows including analog, cosimulation, digital verification, GLS, formal methods, and emulation.
- Proven leadership in testbench architecture, planning, cross-site collaboration, and mentoring.
Skills: UVM, SystemVerilog, pre-silicon, coverage, SerDes
More semiconductor jobs: Synopsys jobs · Verification engineer jobs · Sunnyvale jobs
This role has been open 0 days — well below the 57-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1317
|
Median days open
57 d
|
Category median salary (all employers)
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (1317 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 73 | 1317 |
| Open roles in the wider Digital Design & Verification family | 189 | 3489 · 120 employers |
| Median days open | 49 d | 57 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: UVM, SystemVerilog, pre-silicon, coverage, SerDes
Who's hiring in this category
- Qualcomm · 117 open roles · median 49 d
- NVIDIA · 104 open roles · median 71 d
- Apple · 99 open roles · median 9 d
- AMD · 83 open roles · median 65 d
- Synopsys (this employer) · 73 open roles · median 50 d
- SiFive · 58 open roles · median 63 d
How we counted: 1317 open Design Verification (Design Verification) roles from 99 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.