Power Management Systems Engineer - TX, Austin, United States
Originally posted 20 August 2026 by the employer.
Focus on Windows Modern Standby (S0ix) system features.
About the role
The Power Management Systems Engineer will focus on post-silicon CPU/APU power management feature development solutions. This role drives feature enablement, validation, and debug of Windows Modern Standby (S0ix) system features on mobile and desktop processors.
What you'll do
- Lead client S0i3 power management enablement and validation strategies from pre-silicon through customer adoption. - Drive S0i3 feature enablement and validation in post-silicon lab environment. - Drive debug and resolution of S0i3 system power management issues across silicon, firmware/BIOS, and debug teams. - Develop and lead power management process improvement initiatives including technical test plan development, quality, and efficiency improvements.
What you'll need
- Deep understanding and experience with S0i3 system power management spanning silicon hardware, platform design, and firmware/software interactions. - Experience delivering AMD client processor S0i3 production solutions. - Bachelor’s/Master’s degree in Computer Science or related field.
Nice to have
- Strong expertise in Windows Modern Standby (S0i3) system operation. - Technical leadership in SOC power management with a track record for sustained innovation. - Extensive knowledge of system architecture, technical debug, and validation strategy.
Skills: post silicon CPU/APU, power management, Windows Modern Standby (S0ix), feature enablement, validation, debug
This role has been open 57 days — well above the 41-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
410
|
Median days open
41 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (410 roles · 61 employers) |
|---|---|---|
| Open roles in this specialty | 58 | 410 |
| Open roles in the wider Silicon Validation & Test family | 149 | 2226 · 113 employers |
| Median days open | 43 d | 41 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: post silicon CPU/APU, power management, Windows Modern Standby (S0ix), feature enablement, validation, debug
Who's hiring in this category
- AMD (this employer) · 59 open roles · median 41 d
- Micron Technology · 39 open roles · median 38 d
- Qualcomm · 36 open roles · median 30 d
- NVIDIA · 25 open roles · median 23 d
- Microchip Technology · 21 open roles · median 71 d
- Graphcore · 20 open roles · median 120 d
How we counted: 410 open Post-Silicon Validation (Silicon Validation) roles from 61 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.