Power Architect - Mountain View, CA, United States
$275,000 - $600,000 USD yearly
Originally posted 30 June 2026 by the employer.
About the role
MatX is seeking a Power Architect to drive power architecture and cross-stack power tradeoffs across architecture, RTL, physical design, and platform domains. This role owns the power architecture framework for server-class AI accelerators.
What you'll do
- Own the shared power architecture framework for server-class AI accelerators. - Define power budgets, models, targets, and tradeoff methods. - Build and correlate estimation frameworks that connect architecture intent to implementation reality. - Partner with architecture, RTL, DV, PD, and platform teams to surface and track cross-functional power tradeoffs across the product lifecycle. - Drive decisions across power, performance, area, timing, voltage, thermal, reliability, schedule, and deployability. - Help define power-control features, throttling, and telemetry, translating power assumptions into actionable implementation guidance.
What you'll need
- Deep experience in power architecture, power modeling, power methodology, or power-performance analysis for complex chips. - Ability to reason across architecture, RTL, PD, firmware, platform, and thermal constraints and tradeoffs. - Experience building early models to influence direction and later models for correlation. - Strong analytical skills for modeling, automation, and data analysis. - Clear judgment in cross-functional technical decisions and ability to communicate tradeoffs across multiple disciplines.
Nice to have
- Experience with AI accelerators, GPUs, datacenter CPUs, networking silicon, or other server-class chips. - Experience with ML workloads and perf/Watt analysis. - Experience correlating architectural models to RTL, PD, silicon, or platform measurements.
Skills: power architecture, cross-stack power tradeoffs, AI accelerators, power budgets/models, power-performance analysis
This role has been open 113 days — well above the 76-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
479
|
Median days open
76 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | MatX | All employers we track in this specialty (479 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 479 |
| Open roles in the wider Digital Design & Verification family | 30 | 3283 · 116 employers |
| Median days open | 113 d | 76 d (+37 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: power architecture, cross-stack power tradeoffs, AI accelerators, power budgets/models, power-performance analysis
Who's hiring in this category
- Qualcomm · 79 open roles · median 85 d
- NVIDIA · 54 open roles · median 71 d
- Apple · 38 open roles · median 14 d
- AMD · 35 open roles · median 71 d
- Arm Holdings · 27 open roles · median 119 d
- Micron Technology · 22 open roles · median 111 d
How we counted: 479 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.