Power Analysis and Optimization Engineer - TX, Austin-MET, United States
Originally posted 23 September 2026 by the employer.
About the role
This role involves datacenter server SoC power management feature optimization, power characterization, and product definition.
What you'll do
- Interface with silicon, power architect, firmware, and platform teams for pre-silicon power management feature evaluation.
- Develop test plans for post-silicon power management feature tuning and power characterization.
- Optimize post-silicon power management features for power and performance.
- Perform post-silicon power characterization and correlation.
- Optimize and finalize fuse recipes with the manufacturing team to lock product definition.
What you'll need
- Knowledge of computer hardware architecture (CPU/APU, x86, PCIe, memory, bus logic) and software architecture (driver, BIOS, firmware usage).
- Experience with power management feature enablement and optimization.
- Experience working with manufacturing teams and understanding binning strategy.
- Understanding of modern x86 microprocessor architecture and server platform architecture.
- Experience developing validation methodologies and infrastructure.
- Debug skills at both SoC and system level.
- Familiarity with programming/scripting languages (C/C++, Python, Perl).
- Working knowledge of server OSes (Linux, Windows Server).
- Bachelor’s degree or higher in Electrical/Computer Engineering or Electronics/Computer Science with a minimum of a couple of years of experience in SoC validation and debug.
Nice to have
- Working knowledge of lab equipment such as NIDAQ, oscilloscopes, logic analyzers, and protocol analyzers.
Skills: post silicon power management, power charz, SoC validation, debug, lab equipment, oscilloscopes
This role has been open 17 days — well below the 40-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
397
|
Median days open
40 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (397 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 55 | 397 |
| Open roles in the wider Silicon Validation & Test family | 154 | 2196 · 111 employers |
| Median days open | 43 d | 40 d (+3 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: post silicon power management, power charz, SoC validation, debug, lab equipment, oscilloscopes
Who's hiring in this category
- AMD (this employer) · 55 open roles · median 43 d
- Micron Technology · 40 open roles · median 33 d
- Qualcomm · 34 open roles · median 28 d
- NVIDIA · 24 open roles · median 21 d
- Graphcore · 21 open roles · median 116 d
- Microchip Technology · 20 open roles · median 68 d
How we counted: 397 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.