Post-Silicon Validation and Methodology Engineer - CA, Santa Clara, United States
Originally posted 13 October 2026 by the employer.
About the role
As a Post-Silicon Validation and Methodology Engineer in NVIDIA's Silicon Co-Design Group, you will build the methods, test infrastructure, and coverage strategies that identify issues across GPU, SoC, and CPU programs spanning Datacenter, Gaming, Robotics, Automotive, and Embedded markets.
What you'll do
- Own bring-up, validation, qualification, tuning, and productization plans for silicon from first power-on through PVT sign-off. - Partner across architecture, build, firmware, and software teams to define requirements for power management and clocking features, driving coverage from pre-silicon through production. - Build and deploy AI-assisted lab workflows that automate bring-up telemetry, evaluate silicon measurement data, and provide anomaly detection for regression results and debug triage. - Develop test infrastructure, characterization methodologies, and bring-up playbooks to shift post-silicon coverage left and improve execution velocity. - Lead root-cause analysis on hardware and software interaction issues using lab instrumentation and rigorous hypothesis testing. - Redesign lab processes including bring-up sequencing, debug forums, regression frameworks, and measurement metrics.
What you'll need
- BS or MS in Electrical or Computer Engineering (or equivalent experience) plus 5+ years in silicon bring-up, validation, debug, or productization. - Deep fundamentals across digital development, microarchitecture, timing, clocking, power, noise, and control systems across the HW/SW boundary. - Hands-on lab proficiency with oscilloscopes, logic analyzers, and power analyzers. - Programming and scripting proficiency in Python and C/C++ for building multi-user lab automation or test infrastructure. - Proficiency in using AI tools for automated analysis of bring-up logs, regression data, lab instrumentation output, anomaly detection, or LLM-assisted debug triage.
This role has been open 156 days — well above the 72-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
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Open roles in category
114
|
Median days open
72 d
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Median salary
$185k
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See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (114 roles · 31 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 114 |
| Open roles in the wider Silicon Validation & Test family | 85 | 2238 · 112 employers |
| Median days open | 78 d | 72 d (+6 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 19 open roles · median 45 d
- AMD · 16 open roles · median 72 d
- NVIDIA (this employer) · 12 open roles · median 75 d
- Graphcore · 10 open roles · median 129 d
- Altera · 5 open roles · median 65 d
- Micron Technology · 5 open roles · median 219 d
How we counted: 114 open Post-Silicon Validation (Design Verification) roles from 31 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.