Post-Silicon Memory Subsystem Validation Engineer - TX, Austin, United States
Originally posted 29 September 2026 by the employer.
Work hands-on with DDR and related memory subsystems.
About the role
This role involves working hands-on to validate DDR and related memory subsystems and bring up first silicon in a lab environment. You will build deep technical breadth across memory technologies while partnering with design, firmware, software, platform, and customer-facing teams.
What you'll do
- Ramp quickly on the product, project, lab environment, and active validation priorities.
- Drive customer-facing technical issue resolution.
- Execute post-silicon memory-subsystem validation and first-silicon bring-up activities.
- Isolate issues across hardware, firmware, software, platform, and memory interfaces using debug methods and lab equipment.
- Perform root-cause analysis, reproduce failures, and verify corrective actions.
- Own defined validation and debug deliverables, coordinating with cross-functional partner teams.
What you'll need
- Expertise in DDR and memory systems.
- Post-silicon memory-validation experience.
- Experience with first-silicon bring-up in a laboratory environment.
- Demonstrated root-cause debug skills and experience verifying fixes.
- Ability to isolate issues across hardware and software boundaries.
- Familiarity with laboratory tools and equipment used for silicon and platform debug.
Nice to have
- Pre-silicon validation experience.
- Customer-facing technical issue resolution and cross-functional collaboration experience.
- LPDDR5x or DDR5 memory exposure.
- Experience applying AI or automation to improve engineering productivity.
This role has been open 11 days — well below the 54-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
119
|
Median days open
54 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (119 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 15 | 119 |
| Open roles in the wider Silicon Validation & Test family | 154 | 2196 · 111 employers |
| Median days open | 58 d | 54 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 20 open roles · median 32 d
- AMD (this employer) · 16 open roles · median 58 d
- NVIDIA · 15 open roles · median 64 d
- Graphcore · 10 open roles · median 115 d
- Amazon · 6 open roles · median 34 d
- Synopsys · 6 open roles · median 3 d
How we counted: 119 open Post-Silicon Validation (Design Verification) roles from 29 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.