Lead Co-Packaged Optics (CPO) and Near-Packaged Optics (NPO) interconnect architecture for AI platforms at AMD.
Originally posted 11 November 2026 by the employer.
About the role
This role provides technical leadership across optical engines, high-speed electrical interfaces, ASIC integration, packaging, signal integrity, power integrity, and system-level validation for Co-Packaged Optics (CPO) and Near-Packaged Optics (NPO) on AI scale-up and scale-out platforms. You will lead the architecture, design, implementation, and platform bring-up of optical interconnect solutions spanning 100G and 200G per-lane PAM4 interfaces up to 1.6T optical technologies.
What you'll do
- Lead the architecture, design, implementation, integration, and validation of CPO and NPO solutions for AI scale-up and scale-out platforms.
- Define end-to-end system requirements across optical, electrical, mechanical, thermal, power, firmware, reliability, and manufacturing domains.
- Own technical development from feasibility studies and interface specifications through prototype bring-up, qualification, and production readiness.
- Define and optimize 100G and 200G per-lane PAM4 electrical and optical link architectures supporting 400G, 800G, and 1.6T implementations.
- Drive SerDes and link optimization, including TX/RX equalization, link training, eye analysis, jitter analysis, BER characterization, FEC performance, and latency.
- Direct electrical and optical characterization using DCA-X systems, BERTs, real-time oscilloscopes, optical spectrum analyzers, optical power meters, and VNA and TDR systems.
What you'll need
- B.S. or M.S. in Electrical Engineering, Optical Engineering, Computer Engineering, Physics, Photonics, Applied Physics, or a related technical discipline.
- Deep expertise in CPO and NPO system architecture, silicon photonics, optical-engine integration, and high-speed SerDes operation.
- Hands-on experience with 100G and 200G per-lane PAM4 electrical and optical interfaces across 400G, 800G, or 1.6T technologies.
- Working knowledge of electrical channel design, optical link budgets, FEC architectures, signal integrity, power integrity, and external laser source architectures.
- Experience with high-speed test instrumentation such as DCA-X systems, BERTs, real-time oscilloscopes, optical spectrum analyzers, and VNA and TDR platforms.
- Proficiency in Python or similar programming languages for laboratory automation, data analysis, visualization, and test execution.
Nice to have
- Ph.D. or equivalent industry experience in a related technical discipline.
- 12+ years of experience in optical networking, silicon photonics, high-speed hardware design, SerDes architecture, optical-system integration, package or board design, or system-level interconnect development.
- Working knowledge of IEEE Ethernet standards, OIF implementation agreements, CMIS, and relevant MSAs.
Skills: CPO, NPO, silicon photonics, PAM4, SerDes, optical interconnect
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