Physical Design Timing Engineer - Mountain View, CA, United States
$220,000 - $320,000 USD yearly
Originally posted 2 June 2026 by the employer.
Work on our AI accelerator silicon.
About the role
Own Full chip and Block timing methodologies and execution to-signoff. This role focuses on DensityAI's AI accelerator program.
What you'll do
- Own Full chip and Block timing methodologies and execution to-signoff of our AI accelerator silicon.
What you'll need
- Exceptional abilities across the full physical design flow (synthesis, place & route, CTS, signoff) with emphasis on timing flows and methodologies.
- 10+ years of experience on very high performance designs at advanced technology nodes (7nm or better) and 2.5D/3D timing flows.
- Hands-on with industry-standard PD tools (Cadence Innovus, Synopsys Fusion Compiler, or equivalent) and signoff (PrimeTime, Tempus, or equivalent).
- Demonstrated ability to work closely with architects, RTL designers, EDA vendors, and foundries to design and sign off complex chips.
Nice to have
- Post silicon characterization and process targeting experience is highly desirable.
- Multi-die packaging (CoWoS, 2.5D / 3D), thermal / IR / EM signoff, signal integrity, or DFT-aware physical design.
Skills: timing signoff, place & route, CTS, PrimeTime, advanced technology nodes, AI accelerator
This role has been open 34 days — well below the 61-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
661
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | DensityAI | All employers we track in this specialty (661 roles · 80 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 661 |
| Open roles in the wider Physical Implementation family | 2 | 1469 · 108 employers |
| Median days open | 34 d | 61 d (−27 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: timing signoff, place & route, CTS, PrimeTime, advanced technology nodes, AI accelerator
Who's hiring in this category
- Qualcomm · 123 open roles · median 44 d
- AMD · 59 open roles · median 22 d
- NVIDIA · 39 open roles · median 69 d
- Synopsys · 37 open roles · median 29 d
- Broadcom · 34 open roles · median 94 d
- Intel Corporation · 30 open roles · median 12 d
How we counted: 661 open Physical Design (Physical Design) roles from 80 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.