Physical Design Implementation and Signoff Methodology Lead & Architect - San Jose, California, United States
$231,500 - $341,075 USD yearly
Originally posted 22 September 2026 by the employer.
About the role
This role involves owning and reinventing the implementation and signoff methodology that underpins every tapeout at Altera.
What you'll do
- Own the end-to-end physical design implementation and signoff methodology, including place-and-route implementation, EMIR analysis, timing signoff, and power signoff.
- Define and continuously improve PD implementation and signoff flows and standards.
- Champion an AI/ML-driven mindset across implementation and signoff, introducing predictive and generative techniques.
- Architect implementation and signoff flows to scale efficiently across concurrent designs.
- Partner with process/technology teams, EDA vendors, and design teams to qualify and deploy methodologies for advanced process nodes.
- Lead root-cause analysis of complex implementation, EMIR, timing, and power signoff issues.
What you'll need
- BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field.
- 12+ years of physical design experience, including a minimum of 8 years developing and deploying implementation or signoff methodology.
- Deep, hands-on expertise in physical design implementation and signoff methodology, including electromigration and IR-drop (EMIR) analysis.
- Strong command of timing signoff (STA) and power signoff flows.
- Demonstrated track record of architecting and deploying PD implementation and signoff methodologies across multiple tapeouts and process technology nodes.
- Hands-on proficiency with industry-standard place-and-route, EMIR, STA, and power signoff tools (e.g., Ansys RedHawk-SC, Synopsys PrimeTime/PrimePower/Fusion Compiler, Cadence Innovus/Voltus/Tempus).
- Working knowledge of applying AI/ML techniques (e.g., predictive modeling, ML-based EDA optimization, generative flow automation) to physical design implementation and signoff.
- Scripting and automation proficiency (Python, Tcl).
Nice to have
- Direct experience deploying AI/ML-based EDA solutions in production flows (e.g., ML-driven timing/power/IR prediction, automated ECO generation, anomaly detection in signoff data).
- Experience defining methodology strategy at a Principal or Senior Principal Engineer level across multiple product generations.
- Patents, publications, or conference contributions in physical design implementation, signoff, or AI/ML-for-EDA domains.
Skills: physical design implementation, signoff methodology, place-and-route, EMIR analysis, timing signoff, power signoff
This role has been open 19 days — well below the 61-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
673
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Altera | All employers we track in this specialty (673 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 673 |
| Open roles in the wider Physical Implementation family | 27 | 1475 · 107 employers |
| Median days open | 88 d | 61 d (+27 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: physical design implementation, signoff methodology, place-and-route, EMIR analysis, timing signoff, power signoff
Who's hiring in this category
- Qualcomm · 126 open roles · median 43 d
- AMD · 62 open roles · median 19 d
- NVIDIA · 41 open roles · median 65 d
- Broadcom · 35 open roles · median 90 d
- Synopsys · 35 open roles · median 41 d
- Intel Corporation · 29 open roles · median 11 d
How we counted: 673 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.