Physical Design Engineer, Sr. Staff - Austin, Texas, United States of America, United States
$174,400 - $261,600 USD yearly
Originally posted 8 October 2026 by the employer.
About the role
This role involves defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, and low-power products.
What you'll do
- Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development.
- Create architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
- Collaborate with functional teams to develop and execute an implementation strategy that meets system requirements.
- Evaluate all aspects of the process flow from high-level design to synthesis, place and route, timing and power use, and verification.
- Utilize tools/applications such as RTL to GDS Flow to enable architecture and design of complex blocks/SoC or IC Packages.
- Write detailed technical documentation for EDA/IP/ASIC projects and review documentation for junior engineers.
What you'll need
- Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience; OR Master's degree in Science, Engineering, or related field and 5+ years of experience; OR PhD in Science, Engineering, or related field and 4+ years of experience.
- 9 years of ASIC design, verification, validation, integration, or related work experience.
- 3 years of experience with architecture and design tools.
- 3 years of experience with scripting tools and programming languages.
- 3 years of experience with design verification methods.
- 2 years of work experience in a role requiring interaction with senior leadership.
Skills: ASIC design, RTL to GDS Flow, synthesis, place and route, timing and power use
This role has been open 0 days — well below the 60-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
671
|
Median days open
60 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (671 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 131 | 671 |
| Open roles in the wider Physical Implementation family | 180 | 1495 · 107 employers |
| Median days open | 38 d | 60 d (−22 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: ASIC design, RTL to GDS Flow, synthesis, place and route, timing and power use
Who's hiring in this category
- Qualcomm (this employer) · 130 open roles · median 38 d
- AMD · 59 open roles · median 21 d
- NVIDIA · 42 open roles · median 63 d
- Broadcom · 38 open roles · median 88 d
- Synopsys · 35 open roles · median 39 d
- Micron Technology · 25 open roles · median 78 d
How we counted: 671 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.