Physical Design Engineer - Flow & Methodologies - San Jose, United States
Originally posted 23 July 2026 by the employer.
About the role
As a Physical Design Methodology Engineer at Etched, you will architect the automated physical design flow from first principles.
What you'll do
- Architect, build, and maintain an automated RTL-to-GDSII flow spanning synthesis, place and route, and signoff handoff. - Automate physical design flows end to end, including regression runs, run management, and release and version control of flow configurations. - Build and own the CAD infrastructure supporting physical design, including tool version qualification, deployment, and license and compute usage. - Create block-level and full-chip PG mesh from scratch using design rule documents, design requirements, and EM/IR feedback. - Drive PPA tuning across tool settings and establish timing correlation from pre-route through post-route and signoff tools. - Partner with block and top-level owners to debug flow issues, develop DRC-clean floorplanning flows, and define reference flows for third-party services.
What you'll need
- 5-10+ years of experience in physical design or physical design methodology/CAD. - Experience building and owning automated RTL-to-GDSII flows with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler). - Experience with back-end design on advanced process nodes (5nm and below). - Experience integrating signoff tools such as PrimeTime, Tempus, Voltus, Pegasus, or Calibre into production flows. - Experience with UPF-based low power design methodology and multi-mode multi-corner setup. - Strong Tcl and Python skills for flow development and automation.
Skills: RTL-to-GDSII flow, synthesis, place and route, PPA tuning, advanced process nodes
This role has been open 88 days — well above the 61-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
659
|
Median days open
61 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Etched | All employers we track in this specialty (659 roles · 80 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 659 |
| Open roles in the wider Physical Implementation family | 8 | 1441 · 109 employers |
| Median days open | 88 d | 61 d (+27 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: RTL-to-GDSII flow, synthesis, place and route, PPA tuning, advanced process nodes
Who's hiring in this category
- Qualcomm · 119 open roles · median 46 d
- AMD · 63 open roles · median 25 d
- Intel Corporation · 37 open roles · median 12 d
- Synopsys · 37 open roles · median 33 d
- NVIDIA · 36 open roles · median 71 d
- Broadcom · 30 open roles · median 98 d
How we counted: 659 open Physical Design (Physical Design) roles from 80 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.