$39,000 - $52,000 USD yearly
Originally posted 10 August 2026 by the employer. Relisted by the employer on 28 September 2026.
Work on the digital island implementation within analog chips.
About the role
This role involves the implementation of digital islands within analog chips, focusing on solving physical design challenges in mixed-signal environments.
What you'll do
- Implement key aspects of the ASIC physical design flow, including floorplanning, placement optimization, clock tree synthesis, routing, and physical verification.
- Optimize designs for performance, reliability, and manufacturability.
- Perform chip-level power integrity analysis across multiple voltage domains (IR drop, signal EM, and power EM).
- Work on digital implementation embedded in analog environments.
- Collaborate with global cross-functional teams including analog designers and verification engineers.
What you'll need
- Experience in ASIC Physical Design.
- Strong understanding of floorplanning, placement, CTS, routing, and sign-off checks.
- Knowledge of power integrity analysis (IR drop and electromigration).
Nice to have
- Analog Layout experience.
Skills: ASIC physical design flow, floorplanning, placement optimization, clock tree synthesis, routing, physical verification
This role has been open 67 days — slightly above the 59-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
662
|
Median days open
59 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (662 roles · 81 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 662 |
| Open roles in the wider Physical Implementation family | 31 | 1442 · 110 employers |
| Median days open | 57 d | 59 d (−2 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: ASIC physical design flow, floorplanning, placement optimization, clock tree synthesis, routing, physical verification
Who's hiring in this category
- Qualcomm · 119 open roles · median 44 d
- AMD · 63 open roles · median 23 d
- NVIDIA · 38 open roles · median 69 d
- Synopsys · 37 open roles · median 31 d
- Intel Corporation · 36 open roles · median 10 d
- Broadcom · 31 open roles · median 96 d
How we counted: 662 open Physical Design (Physical Design) roles from 81 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.