Physical Design Engineer, AI Accelerator IP - Austin, Texas, United States
$100,000 - $500,000 USD yearly
Originally posted 12 August 2026 by the employer.
This role focuses on the physical implementation of RISC-V and AI IP blocks.
About the role
This role involves the end-to-end physical implementation of AI Accelerator IP blocks, from synthesis through place and route to GDSII signoff. The position directly influences customer timelines for hardened, PPA-proven deliverables on target nodes.
What you'll do
- Own physical implementation of IP blocks end-to-end.
- Work closely with RTL owners to close critical paths and hit power budgets.
- Build floorplans, power grids, pin placement, and clocking strategies.
- Deliver IP integration collateral (LEF/DEF, timing and power models, GDS, signoff reports).
- Ensure rigorous signoff quality for IP shipping to external customers.
What you'll need
- BS/MS/PhD in EE/ECE/CE/CS with 5+ years of block-level or IP-centric physical design through tapeout.
- Expertise with industry-standard tools (Innovus, ICC2/FusionCompiler, PrimeTime).
- Expertise with scripting languages (Tcl, Python, Perl).
- Deep understanding of advanced node challenges.
- Deep understanding of low-power design (UPF, power gating, multi-Vt, voltage scaling).
- Deep understanding of signoff (STA, LEC).
- Track record of block-level and IP tapeouts on advanced nodes.
Skills: physical implementation, PnR, timing closure, GDSII signoff, advanced nodes
This role has been open 66 days — slightly above the 59-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
662
|
Median days open
59 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (662 roles · 81 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 662 |
| Open roles in the wider Physical Implementation family | 12 | 1442 · 110 employers |
| Median days open | 168 d | 59 d (+109 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: physical implementation, PnR, timing closure, GDSII signoff, advanced nodes
Who's hiring in this category
- Qualcomm · 119 open roles · median 44 d
- AMD · 63 open roles · median 23 d
- NVIDIA · 38 open roles · median 69 d
- Synopsys · 37 open roles · median 31 d
- Intel Corporation · 36 open roles · median 10 d
- Broadcom · 31 open roles · median 96 d
How we counted: 662 open Physical Design (Physical Design) roles from 81 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.