Physical design CAD engineer
Originally posted 24 September 2026 by the employer.
About the role
This role involves physical design and methodology for high-performance processor chips. You will work on future designs of high-performance processor chips in a CMOS process technology, targeted at server, 5G/6G, automotive, and networking applications.
What you'll do
- Work with design teams across Digital/RTL/Analog to ensure design convergence and integration.
- Implement/support multi-voltage designs through all aspects of implementation (place and route, static timing, physical verification) using industry standard EDA tools.
- Integrate new AI based design flows.
- Drive successful design closure.
- Write scripts in Shell, Python, and TCL for productivity enhancements through AI and automation.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 4+ years of progressive experience in back-end physical design and verification.
- Good understanding of RTL to GDS flows and methodology.
- Expertise in full-chip & sub-hierarchy integration.
- Experience integrating and taping out large designs utilizing a digital design environment.
- Good scripting skills in Perl, tcl and Python.
Nice to have
- Experience with multi-voltage and low-power design techniques.
- Experience with Cadence Genus and Innovus.
Skills: physical design, CAD engineer, RTL to GDS flows, EDA tools, scripting
This role has been open 0 days — well below the 85-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
683
|
Median days open
85 d
|
Median salary
$197k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (683 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 683 |
| Open roles in the wider Physical Implementation family | 17 | 1417 · 108 employers |
| Median days open | 110 d | 85 d (+25 d vs this employer) |
| Median salary (USD postings) | — | $197k |
Skills observed across this category: physical design, CAD engineer, RTL to GDS flows, EDA tools, scripting
Who's hiring in this category
- Cadence Design Systems · 171 open roles · median 147 d
- Synopsys · 57 open roles · median 61 d
- NVIDIA · 45 open roles · median 76 d
- Micron Technology · 39 open roles · median 104 d
- Qualcomm · 37 open roles · median 65 d
- Intel Corporation · 26 open roles · median 25 d
How we counted: 683 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.