PhD Research Intern, Electronic Design Automation - 2027 - CA, Santa Clara, United States
$38 - $94 USD yearly
Originally posted 23 September 2026 by the employer.
About the role
This PhD Research Intern role focuses on research at the intersection of AI, GPU computing, Formal Methods, and Electronic Design Automation (EDA). The role specifically involves applying AI and GPU acceleration to chip design workflows.
What you'll do
- Apply AI (Agentic AI, LLMs, Generative AI, Reinforcement learning) and GPU acceleration to chip design workflows.
- Research and develop EDA software and algorithms.
- Collaborate with circuits, VLSI, and architecture team members.
- Plan to publish and present original research.
What you'll need
- Pursuing a PhD in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
- Programming skills in rapid prototyping environments such as Python.
- Expertise in EDA algorithms (e.g., formal verification techniques, logic synthesis, physical design, timing and signoff) combined with publications and project experience applying AI to problems.
- Excellent self-motivation, creativity, and ability to work effectively within a research team.
- Excellent written and verbal communication skills, with proven experience communicating technical work.
Nice to have
- C++ and parallel programming (e.g., CUDA).
Skills: EDA algorithms, agentic AI, LLMs, GPU computing, chip design workflows, physical design algorithms, formal methods
This role has been open 0 days — well below the 55-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · AI EDA Design
|
Open roles in category
53
|
Median days open
55 d
|
Median salary
$207k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (53 roles · 21 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 53 |
| Open roles in the wider Physical Implementation family | 93 | 1417 · 108 employers |
| Median days open | 19 d | 55 d (−36 d vs this employer) |
| Median salary (USD postings) | — | $207k |
Skills observed across this category: EDA algorithms, agentic AI, LLMs, GPU computing, chip design workflows, physical design algorithms
Who's hiring in this category
- NXP Semiconductors · 12 open roles · median 42 d
- Cadence Design Systems · 6 open roles · median 31 d
- NVIDIA (this employer) · 6 open roles · median 41 d
- Qualcomm · 4 open roles · median 51 d
- Micron Technology · 3 open roles · median 139 d
- Synopsys · 3 open roles · median 36 d
How we counted: 53 open EDA/CAD Engineering (AI EDA Design) roles from 21 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.