Performance Architect, CPU Cluster - Remote
$100,000 - $500,000 USD yearly
Originally posted 17 September 2026 by the employer.
About the role
What you'll do
- Analyze and optimize CPU cluster performance, including cache hierarchies, interconnects, coherence, and memory access behavior.
- Build and use performance models and simulation environments such to evaluate architectural concepts and identify performance opportunities.
- Study real workloads to understand bottlenecks related to cache misses, coherence traffic, memory bandwidth, latency, contention, and core-to-core communication.
- Lead architectural tradeoff studies across performance, scalability, bandwidth, latency, power, and implementation complexity.
- Collaborate with CPU, cache, interconnect, memory, software, and system architects to translate performance analysis into concrete design decisions.
What you'll need
- Strong foundation in CPU microarchitecture and performance, with an understanding of how cores, caches, interconnects, and memory systems interact.
- Experience using modeling, simulation, and workload analysis to understand cluster-level performance bottlenecks and scaling challenges.
- Comfort moving between detailed microarchitecture and broader system-level questions around latency, bandwidth, quality of service, utilization, and scalability.
- Ability to turn large amounts of performance data into clear architectural recommendations.
Skills: CPU cluster, cache hierarchies, coherent interconnects, performance models, RISC-V, chiplets
This role has been open 26 days — well below the 80-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
453
|
Median days open
80 d
|
Median salary
$234k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (453 roles · 63 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 453 |
| Open roles in the wider Digital Design & Verification family | 30 | 3166 · 114 employers |
| Median days open | 161 d | 80 d (+81 d vs this employer) |
| Median salary (USD postings) | — | $234k |
Skills observed across this category: CPU cluster, cache hierarchies, coherent interconnects, performance models, RISC-V, chiplets
Who's hiring in this category
- Qualcomm · 72 open roles · median 84 d
- NVIDIA · 59 open roles · median 67 d
- AMD · 35 open roles · median 63 d
- Apple · 34 open roles · median 7 d
- Arm Holdings · 27 open roles · median 110 d
- NXP Semiconductors · 21 open roles · median 112 d
How we counted: 453 open SoC/Chip Architecture (SOC Architecture) roles from 63 employers tracked in the SemiconductorJobs index, counted 13 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.