PCIe Design Verification Intern - Summer 2027 - TX, Austin, United States
$20 - $71 USD yearly
Originally posted 6 October 2026 by the employer.
Verifying PCIe and CXL hardware functionality.
About the role
This internship focuses on design verification of PCIe and CXL hardware functionality and performance within an SV/UVM test-bench environment. You will contribute to enabling new features, developing coverage and checkers, and analyzing simulation performance.
What you'll do
- Develop directed or random diagnostics to validate processor Instruction Set Architecture (ISA), reference models, C simulation models, RTL models, HW emulators, and real hardware.
- Write and review validation test plans.
- Debug diagnostics on various platforms.
- Collaborate with engineers on planning, development, and deployment.
What you'll need
- Pursuing a BS or MS in Computer Science, Computer Engineering, Electrical Engineering, or a related degree.
- Exposure to computer architecture, ASIC design, or verification methodology.
- Familiarity with Object Oriented programming and/or SystemVerilog.
- Previous scripting experience in Python or Perl.
Skills: PCIe, diagnostics, processor ISA, reference models, RTL models, SystemVerilog, Python or Perl
This role has been open 0 days — well below the 61-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1203
|
Median days open
61 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1203 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 79 | 1203 |
| Open roles in the wider Digital Design & Verification family | 237 | 3179 · 113 employers |
| Median days open | 60 d | 61 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: PCIe, diagnostics, processor ISA, reference models, RTL models, SystemVerilog
Who's hiring in this category
- AMD · 104 open roles · median 47 d
- Qualcomm · 102 open roles · median 45 d
- NVIDIA (this employer) · 75 open roles · median 61 d
- Synopsys · 70 open roles · median 29 d
- SiFive · 56 open roles · median 60 d
- Cadence Design Systems · 52 open roles · median 113 d
How we counted: 1203 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 7 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.