PCIe Design Verification Intern - Spring 2027 - CA, Santa Clara, United States
$20 - $71 USD yearly
Originally posted 6 October 2026 by the employer.
Verify PCIe and CXL hardware functionality and performance.
About the role
This internship involves verifying PCIe and CXL hardware functionality and performance within an SV/UVM test-bench.
What you'll do
- Develop directed or random diagnostics to validate processor ISA, reference models, C simulation models, RTL models, HW emulators, and real hardware.
- Write and review validation test plans.
- Debug diagnostics on various platforms.
- Collaborate with a worldwide team of engineers on planning, development, and deployment.
What you'll need
- Pursuing a BS or MS in Computer Science, Computer Engineering, Electrical Engineering, or a related degree.
- Exposure to computer architecture, ASIC design, or verification methodology.
- Familiarity with Object Oriented programming and/or SystemVerilog.
- Scripting experience in Python or Perl.
Skills: PCIe, diagnostics, test plans, SystemVerilog, RTL models
This role has been open 0 days — well below the 61-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1203
|
Median days open
61 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1203 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 79 | 1203 |
| Open roles in the wider Digital Design & Verification family | 237 | 3179 · 113 employers |
| Median days open | 60 d | 61 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: PCIe, diagnostics, test plans, SystemVerilog, RTL models
Who's hiring in this category
- AMD · 104 open roles · median 47 d
- Qualcomm · 102 open roles · median 45 d
- NVIDIA (this employer) · 75 open roles · median 61 d
- Synopsys · 70 open roles · median 29 d
- SiFive · 56 open roles · median 60 d
- Cadence Design Systems · 52 open roles · median 113 d
How we counted: 1203 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 7 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.