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DensityAI

PCB Quality Engineer - Mountain View, CA, United States

DensityAI Mountain View, CA, United States 4 days ago
Digital Design & SoC Architecture

$215,000 USD yearly

Originally posted 6 October 2026 by the employer.

This role focuses on advanced PCBs and package substrates for AI accelerator silicon.

About the role

This role owns the technology roadmap, manufacturability, and quality of advanced PCBs and package substrates for AI accelerator silicon. You will drive the substrate and PCB technology towards embedded passives/actives, inorganic core substrates, and novel thermal solutions.

What you'll do

  • Drive the advanced substrate and PCB technology roadmap, including embedded passive/active integration and inorganic core substrates.
  • Develop and qualify new materials, structures, and processes with substrate and PCB vendors.
  • Cowork with cross-functional teams (packaging, SI/PI, thermal, mechanical, systems) to improve and enable new product architectures.
  • Lead DFM/DFx reviews for high-layer-count PCBs and organic package substrates (flip-chip BGA / ABF).
  • Own substrate and PCB supplier quality, including qualifying suppliers and driving PPAP/first-article.
  • Define quality standards and acceptance criteria (IPC and internal) and drive defect and failure analysis.

What you'll need

  • BS/MS in Electrical, Materials, Mechanical, or Manufacturing Engineering plus 5+ years in advanced PCB/substrate technology development, DFM, or manufacturing/supplier quality for complex electronics.
  • Hands-on experience developing and qualifying advanced substrate/PCB technologies, including embedded passives/actives, inorganic and organic core substrates, ABF build-up, flip-chip BGA.
  • Strong grasp of advanced PCB and substrate fabrication processes (lamination, drilling/laser via, plating, ABF build-up, flip-chip BGA).
  • Experience partnering cross-functionally (packaging, SI/PI, thermal, mechanical, systems) to enable new product architectures.
  • Supplier quality depth, including qualification, PPAP/first-article, process capability, and driving corrective action with fab/substrate partners.
  • Fluency in IPC standards (e.g., IPC-6012 / IPC-A-600 or substrate equivalents) and quality acceptance criteria.
  • Failure-analysis skills: cross-section, metrology, and electrical debug to root-cause defects.
Market context

This role has been open 3 days — well below the 50-day median for Hardware Systems Engineering roles.

Hardware Systems Engineering · AI ML Hardware

Open roles in category
939
Median days open
50 d
Median salary
$157k
See the full market breakdown ▾Category comparison, and who else is hiring
How DensityAI compares in Hardware Systems Engineering hiring
Metric DensityAI All employers we track in this specialty (939 roles · 103 employers)
Open roles in this specialty 5 939
Open roles in the wider Software, Firmware & Systems family 10 6047 · 146 employers
Median days open 28 d 50 d (−22 d vs this employer)
Median salary (USD postings) — $157k

Who's hiring in this category

  • Intel Corporation · 70 open roles · median 27 d
  • KLA Corporation · 57 open roles · median 41 d
  • NVIDIA · 53 open roles · median 63 d
  • Teradyne · 47 open roles · median 21 d
  • Applied Materials · 46 open roles · median 58 d
  • AMD · 44 open roles · median 61 d

How we counted: 939 open Hardware Systems Engineering (AI ML Hardware) roles from 103 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.

DensityAI

DensityAI

Apply now
Mountain View, CA, United States
On-site
$215,000 USD yearly
4 days ago

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