PCB Layout Design Engineer
$135,000 - $175,000 USD yearly
Lead the end-to-end physical layout of high-density mixed-signal boards featuring GaN RF power stages up to 10 GHz, FPGAs, and DDR4.
Originally posted 2 November 2026 by the employer.
About the role
Lead the end-to-end physical layout of high-density boards, including GaN RF power stages operating up to 10 GHz positioned alongside FPGAs, DDR4, and high-current power circuits. You will work directly with system architects, RF engineers, and manufacturing partners to define design rules, stackups, libraries, and layout workflows.
What you'll do
- Execute high-density, multilayer PCB layouts in Altium Designer from stackup definition and placement through routing, review, and release.
- Route complex mixed-signal circuits, including high-speed digital interfaces (FPGA/BGA fanout, DDR4) and RF paths up to 10 GHz.
- Apply constraint management and advanced routing rules to maintain signal and power integrity across sensitive RF, analog, and digital domains.
- Partner with PCB fabrication and PCBA assembly vendors to confirm capabilities, define stackups, and apply DFx principles to optimize yield and cost.
- Build and maintain schematic symbols and footprints from datasheets aligned with IPC standards and internal library guidelines.
- Participate in formal schematic and layout design reviews while contributing to internal PCB design standards.
What you'll need
- 3+ years of professional PCB layout experience using Altium Designer.
- Track record of mixed-signal PCB designs incorporating RF layout up to 10 GHz.
- Hands-on experience routing complex FPGA/BGA footprints and high-speed digital buses, including DDR4.
- Practical knowledge of stackup design, impedance control, grounding, plane partitioning, and signal/power integrity principles.
- Experience building component libraries from datasheets to IPC standards.
- Background collaborating directly with PCB and PCBA vendors through vendor selection, NPI, and production ramp.
- Working knowledge of DFx principles and cost optimization for complex board layouts.
Nice to have
- Experience with thermal management in high-power-density designs, particularly GaN or RF power amplifiers.
- Background serving as an ECAD or PCB librarian managing a central, IPC-compliant component library.
- IPC CID or CID+ certification.
More semiconductor jobs: Hardware design jobs · Sunnyvale jobs
This role has been open 0 days — well below the 47-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · AI ML Hardware
|
Open roles in category
1072
|
Median days open
47 d
|
Category median salary (all employers)
$148k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Eridan | All employers we track in this specialty (1072 roles · 100 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 1072 |
| Open roles in the wider Software, Firmware & Systems family | 1 | 6325 · 145 employers |
| Median days open | 0 d | 47 d (−47 d vs this employer) |
| Median salary (USD postings) | — | $148k |
Who's hiring in this category
- Intel Corporation · 83 open roles · median 40 d
- KLA Corporation · 61 open roles · median 57 d
- Teradyne · 58 open roles · median 46 d
- NVIDIA · 55 open roles · median 69 d
- Applied Materials · 53 open roles · median 60 d
- ASML · 50 open roles · median 28 d
How we counted: 1072 open Hardware Systems Engineering (AI ML Hardware) roles from 100 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.