Packaging Mechanical Engineer - Mountain View, CA, United States
$190,000 USD yearly
Originally posted 6 August 2026 by the employer.
About the role
As a Packaging Mechanical Engineer, you will own the thermo-mechanical design of advanced multi-die 2.5D packages for AI accelerator silicon. You will ensure package integrity by modeling warpage and stress, designing key components, and setting mechanical rules for OSATs.
What you'll do
- Own thermo-mechanical modeling and FEA for multi-die packages, including warpage across reflow and assembly, die and interconnect stress, CTE mismatch, and structural response under thermal and mechanical load.
- Own package mechanical design, including lid and heat spreader, stiffener, underfill and mold compound selection, and TIM specification and bondline control at the package-to-cooling interface.
- Drive assembly process mechanics and mechanical design rules with OSATs and substrate suppliers, and own socket and load-frame mechanics for high-force accelerator sockets.
- Correlate models to measurement (shadow moire, strain gauge, DIC) and drive DOEs to close the gap between simulation and silicon.
What you'll need
- Exceptional abilities in thermo-mechanical analysis of semiconductor packages: warpage prediction and control, die and solder-joint stress, delamination and interfacial fracture risk, and material and structural tradeoffs.
- 8+ years of packaging mechanical experience on high-performance designs, including 2.5D / 3D and multi-die packages (CoWoS, EMIB, InFO, fan-out, or equivalent) and HBM-bearing assemblies.
- Hands-on with industry-standard FEA tools (Ansys Mechanical, Abaqus, or equivalent) and strong materials knowledge across underfills, mold compounds, substrates, TIMs, and lid materials.
- Demonstrated ability to work closely with packaging, thermal, reliability, board, and OSAT partners to converge mechanical designs and sign them off against JEDEC and IPC standards.
This role has been open 34 days — well below the 50-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · AI ML Hardware
|
Open roles in category
964
|
Median days open
50 d
|
Median salary
$155k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | DensityAI | All employers we track in this specialty (964 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 964 |
| Open roles in the wider Software, Firmware & Systems family | 10 | 6145 · 145 employers |
| Median days open | 34 d | 50 d (−16 d vs this employer) |
| Median salary (USD postings) | — | $155k |
Who's hiring in this category
- Intel Corporation · 71 open roles · median 33 d
- KLA Corporation · 65 open roles · median 42 d
- Teradyne · 55 open roles · median 27 d
- NVIDIA · 52 open roles · median 67 d
- Applied Materials · 49 open roles · median 63 d
- AMD · 45 open roles · median 44 d
How we counted: 964 open Hardware Systems Engineering (AI ML Hardware) roles from 103 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.