Originally posted 1 September 2026 by the employer.
About the role
This role involves being the gatekeeper of design quality, responsible for running critical verification flows including DRC, LVS, and DFM for complex multi-die advanced packaging architectures.
What you'll do
- Own and execute comprehensive PKG floor-planning Checks, DRC, LVS, and DFM flows.
- Refine and optimize engineering workflows by implementing automated validation checkpoints.
- Identify bottlenecks in the current verification pipeline and help develop automated scripts, custom methodologies, or enhanced design kits.
- Partner closely with Package Architects, Physical Layout Designers, and Supply Partners to resolve complex violation reports.
- Author clear engineering documentation for newly established verification processes and train other members on these methodologies.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, and 3+ years of experience in semiconductor design or manufacturing roles.
- Proven experience driving quality improvement, design or process validation.
- Strong scripting skills (TCL, Python, Perl, or Skill) to execute and automate verification tasks and data analysis.
Nice to have
- Running and debugging DRC, LVS, and DFM on complex silicon or packaging layouts.
- Experience with industry-standard physical verification tools (e.g., Siemens Calibre, Synopsys IC Validator, or Cadence Pegasus).
- Familiarity with advanced packaging technologies (e.g., 2.5D/3D IC, Chiplets, CoWoS, silicon interposers, or high-density fan-out architecture).
Skills: DRC, LVS, DFM, advanced packaging, multi-die, Calibre
This role has been open 46 days — exactly the 46-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
69
|
Median days open
46 d
|
Median salary
$169k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (69 roles · 25 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 69 |
| Median days open | 37 d | 46 d (−9 d vs this employer) |
| Median salary (USD postings) | — | $169k |
Skills observed across this category: DRC, LVS, DFM, advanced packaging, multi-die, Calibre
Who's hiring in this category
- Micron Technology · 10 open roles · median 169 d
- AMD · 9 open roles · median 44 d
- NVIDIA · 6 open roles · median 40 d
- Marvell Technology (this employer) · 5 open roles · median 37 d
- Broadcom · 4 open roles · median 140 d
- GlobalFoundries · 4 open roles · median 108 d
How we counted: 69 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 25 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.