Package Design Engineer - United States
$82,500 - $132,000 USD yearly
Originally posted 8 September 2026 by the employer — open 12 days.
About the role
This role is for an IC package-design engineer focused on complex flip-chip-BGA packages for ASICs with high-speed SerDes and very-high-power delivery needs.
What you'll do
- Take overall design responsibility for ASIC package designs.
- Design critical structures for SerDes, ADC/DAC, DDR.
- Schedule, prioritize, and track work across multiple projects simultaneously.
- Perform general flip-chip BGA package design and engineering.
- Manage projects and interface with customers for design projects.
- Contribute to efficiency improvements through process development, automation, and documentation.
What you'll need
- BSEE or similar field and 2+ years of experience in flip-chip-BGA package design.
- Experience with high-speed SerDes.
- Knowledge of electrical engineering fundamentals.
- Ability to cooperate with a worldwide team across multiple time zones.
- Self-management and organization skills.
Nice to have
- Working knowledge of package-level signal integrity and power integrity.
- Cadence APD (allegro package designer) experience.
- 1 or more years of experience with Cadence SKILL for Allegro or similar design-automation coding experience.
Skills: flip-chip-BGA, package design, SerDes, signal integrity, power integrity
This role has been open 12 days — well below the 38-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
67
|
Median days open
38 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (67 roles · 24 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 67 |
| Median days open | 163 d | 38 d (+125 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: flip-chip-BGA, package design, SerDes, signal integrity, power integrity
Who's hiring in this category
- Micron Technology · 13 open roles · median 143 d
- AMD · 6 open roles · median 27 d
- Marvell Technology · 6 open roles · median 13 d
- Broadcom (this employer) · 5 open roles · median 163 d
- NVIDIA · 5 open roles · median 38 d
- Amazon · 4 open roles · median 26 d
How we counted: 67 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 24 employers tracked in the SemiconductorJobs index, counted 21 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.