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Synopsys

NVM Circuit Design Engineer, Staff

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Hsinchu, Taiwan 1 month ago
Digital Design & SoC Architecture

Originally posted 3 September 2026 by the employer.

This role focuses on the architecture, design, and verification of CMOS-based non-volatile memory IP modules.

About the role

This role involves leading NVM TestChip and IP design flows across multiple technologies and foundries, ensuring robust and scalable solutions for diverse applications. The position focuses on the architecture, design, and verification of CMOS-based non-volatile memory IP modules, from concept to production tapeout.

What you'll do

  • Lead NVM TestChip and IP design flows across multiple technologies and foundries.
  • Architect, design, and verify CMOS-based non-volatile memory IP modules.
  • Collaborate with product engineers to perform silicon verification, in-depth testing, and debugging to validate IP performance on silicon.
  • Conduct post-layout extraction, simulation, and comprehensive testing in conjunction with silicon validation teams.
  • Partner with layout designers on floor planning of memory arrays and analog blocks.
  • Serve as the technical expert to support Sales and Application Engineers during customer engagements.

What you'll need

  • 5–12+ years of industry experience in circuit design, with a strong emphasis on analog circuit design and analysis.
  • Deep understanding of layout considerations for advanced nodes, including parasitic effects, matching techniques, and signal integrity.
  • Expertise in electrical problem-solving, including root cause analysis of circuit failures and development of effective solutions.
  • Hands-on experience with TestChip tapeout flows, silicon debugging (FIB, micro-probing, post-layout RC extraction), and statistical design methodologies (e.g., Monte-Carlo analysis).
  • Strong transistor-level analog design skills, including sense-amplifier, charge pump, high voltage regulator, and bandgap reference circuit design.
  • Proficiency with circuit simulation tools (HSIM, HSPICE) and custom schematic/layout editors (e.g., Custom Compiler).

Nice to have

  • Memory design experience.
  • Experience with low power design, power management circuitry, and FinFET design.

Skills: NVM, analog circuit design, TestChip tapeout, silicon debugging, sense-amplifier

Market context

This role has been open 31 days — well below the 69-day median for Memory Design roles.

Memory Design · Memory Design

Open roles in category
287
Median days open
69 d
Median salary
$205k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Synopsys compares in Memory Design hiring
Metric Synopsys All employers we track in this specialty (287 roles · 29 employers)
Open roles in this specialty 27 287
Median days open 49 d 69 d (−20 d vs this employer)
Median salary (USD postings) — $205k

Skills observed across this category: NVM, analog circuit design, TestChip tapeout, silicon debugging, sense-amplifier

Who's hiring in this category

  • Micron Technology · 151 open roles · median 86 d
  • Synopsys (this employer) · 27 open roles · median 49 d
  • SanDisk · 17 open roles · median 32 d
  • Broadcom · 16 open roles · median 50 d
  • Qualcomm · 12 open roles · median 149 d
  • NVIDIA · 7 open roles · median 59 d

How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Synopsys

Synopsys

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img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Hsinchu, Taiwan
On-site
1 month ago

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