NVIDIA 2027 Internships: Hardware ASIC Design - CA, Santa Clara, United States
$20 - $71 USD yearly
Originally posted 19 August 2026 by the employer.
About the role
This internship focuses on Hardware ASIC Design within NVIDIA's hardware teams. Interns will work on projects with measurable impact on the business.
What you'll do
- Contribute to projects involving RTL Design and HDL, Digital Systems, Digital Design, and VLSI Design.
- Participate in activities related to Timing and Static Timing Analysis (STA), Synthesis, and Power and Performance Optimization.
- Develop and create Testbenches, or work on Gate-Level Netlists.
- Explore Computer Architecture, Computer Arithmetic, and System-on-Chip (SoC) aspects.
- Engage with CAD and Physical Design Methodologies, including Flow and Tools Development.
- Support Performance, Verification, and Emulation Methodology efforts.
What you'll need
- Actively enrolled in a university pursuing a B.S., M.S., or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field.
- Anticipated graduation date clearly indicated on resume or CV.
- Course or internship experience in RTL Design, HDL, Digital Systems, Digital Design, VLSI Design, or Chip Blueprint.
- Course or internship experience in Timing and Static Timing Analysis (STA) or Synthesis.
- Familiarity with SystemVerilog, Verilog, VHDL, UVM, Perl, TCL, C, C++, Python, or Linux.
- Knowledge of Computer Architecture, Functional Coverage, CMOS Transistors, Circuits, or SRAM Design.
Skills: RTL Design, VLSI Design, Timing and Static Timing Analysis, Synthesis, SystemVerilog
This role has been open 58 days — below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1021
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1021 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 44 | 1021 |
| Open roles in the wider Digital Design & Verification family | 235 | 3198 · 115 employers |
| Median days open | 58 d | 62 d (−4 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL Design, VLSI Design, Timing and Static Timing Analysis, Synthesis, SystemVerilog
Who's hiring in this category
- Qualcomm · 140 open roles · median 62 d
- Synopsys · 85 open roles · median 30 d
- AMD · 71 open roles · median 36 d
- Analog Devices · 48 open roles · median 50 d
- NVIDIA (this employer) · 46 open roles · median 64 d
- NXP Semiconductors · 41 open roles · median 85 d
How we counted: 1021 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.