NPU Compiler Engineer - CA, San Jose, United States
Originally posted 21 September 2026 by the employer.
About the role
This role involves enhancing the capabilities of the Vitis-AI and Ryzen-AI software platforms to compile Machine Learning networks for AMD devices with AI-engines.
What you'll do
- Enhance, implement, and design compiler passes in the MLIR framework for implementing and optimizing AI workloads on NPU.
- Analyze and debug functional and performance issues.
- Build infrastructure for analysis and debug of regression suites.
- Apply AI and coding agents to compiler development, debugging, test generation, and performance analysis.
- Apply a data-minded approach to target optimization efforts.
- Debug and fix existing issues and research alternative, more efficient ways to accomplish the same work.
What you'll need
- Experience with MLIR optimization and lowering passes.
- Strong knowledge of compiler architecture, intermediate representations, transformation passes, and optimization pipelines.
- Strong understanding of NPU architecture, including parallel execution, memory hierarchy, caches, registers, synchronization, and occupancy.
- Strong C++ and Python skills.
- Experience with AI compilers, tensor or graph compilers, and machine learning frameworks.
- Bachelor's or Master's degree in Computer Science, Computer Engineering, or Electrical Engineering.
Nice to have
- Strong object-oriented programming background, C/C++ preferred.
- Experience with debugging using SystemC and RTL simulators.
Skills: MLIR, compiler architecture, NPU architecture, AI workloads, C++
This role has been open 20 days — well below the 50-day median for Infrastructure/Platform Software roles.
Infrastructure/Platform Software · AI ML Hardware
|
Open roles in category
107
|
Median days open
50 d
|
Median salary
$220k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (107 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 107 |
| Open roles in the wider Software, Firmware & Systems family | 407 | 6028 · 146 employers |
| Median days open | 45 d | 50 d (−5 d vs this employer) |
| Median salary (USD postings) | — | $220k |
Skills observed across this category: MLIR, compiler architecture, NPU architecture, AI workloads, C++
Who's hiring in this category
- NVIDIA · 25 open roles · median 45 d
- Qualcomm · 22 open roles · median 48 d
- AMD (this employer) · 9 open roles · median 44 d
- Intel Corporation · 8 open roles · median 18 d
- NXP Semiconductors · 5 open roles · median 44 d
- Graphcore · 4 open roles · median 112 d
How we counted: 107 open Infrastructure/Platform Software (AI ML Hardware) roles from 29 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.