NoC Interconnect Design Engineer and Architect
$98,500 - $147,700 USD yearly
Originally posted 27 August 2026 by the employer.
About the role
As an ASIC Engineer at Qualcomm, you will assist in defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development.
What you'll do
- Apply ASIC knowledge to assist and support the defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development. - Assist in the creation of architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements. - Collaborate with team members to assist in the development of an implementation strategy that meets system requirements. - Support the evaluation of process flows from high-level design to synthesis, place and route, timing and power, and verification, or custom circuit design/layout flows. - Utilize tools and applications such as RTL to GDS Flow and Virtuoso to execute architecture and design of specific block/SoC or IC Package components. - Write technical documentation for EDA, IP, and ASIC projects.
What you'll need
- Bachelor's degree in Science, Engineering, or a related field.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. - 6 months of experience with architecture and design tools. - 6 months of experience with scripting tools and programming languages. - 6 months of experience with design verification methods.
Skills: NoC Interconnect, ASIC knowledge, architectures, circuit specifications, RTL to GDS Flow
This role has been open 55 days — well below the 76-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
479
|
Median days open
76 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (479 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 79 | 479 |
| Open roles in the wider Digital Design & Verification family | 407 | 3283 · 116 employers |
| Median days open | 84 d | 76 d (+8 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: NoC Interconnect, ASIC knowledge, architectures, circuit specifications, RTL to GDS Flow
Who's hiring in this category
- Qualcomm (this employer) · 79 open roles · median 85 d
- NVIDIA · 54 open roles · median 71 d
- Apple · 38 open roles · median 14 d
- AMD · 35 open roles · median 71 d
- Arm Holdings · 27 open roles · median 119 d
- Micron Technology · 22 open roles · median 111 d
How we counted: 479 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.